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https://github.com/c64scene-ar/llvm-6502.git
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92e28620d3
This commit refines the pattern for the octeon seq/seqi/sne/snei instructions. The target register is set to 0 or 1 according to the result of the comparison. In C, this is something like rd = (unsigned long)(rs == rt) This commit adds a zext to bring the result to i64. With this change the instruction is selected for this type of code. (gcc produces the same code for the above C code.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225968 91177308-0d34-0410-b5e6-96231b3b80d8
96 lines
2.1 KiB
LLVM
96 lines
2.1 KiB
LLVM
; RUN: llc -O1 < %s -march=mips64 -mcpu=octeon | FileCheck %s -check-prefix=OCTEON
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; RUN: llc -O1 < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=MIPS64
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define i64 @addi64(i64 %a, i64 %b) nounwind {
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entry:
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; OCTEON-LABEL: addi64:
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; OCTEON: jr $ra
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; OCTEON: baddu $2, $4, $5
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; MIPS64-LABEL: addi64:
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; MIPS64: daddu
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; MIPS64: jr
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; MIPS64: andi
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%add = add i64 %a, %b
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%and = and i64 %add, 255
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ret i64 %and
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}
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define i64 @mul(i64 %a, i64 %b) nounwind {
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entry:
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; OCTEON-LABEL: mul:
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; OCTEON: jr $ra
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; OCTEON: dmul $2, $4, $5
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; MIPS64-LABEL: mul:
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; MIPS64: dmult
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; MIPS64: jr
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; MIPS64: mflo
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%res = mul i64 %a, %b
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ret i64 %res
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}
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define i64 @cmpeq(i64 %a, i64 %b) nounwind {
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entry:
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; OCTEON-LABEL: cmpeq:
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; OCTEON: jr $ra
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; OCTEON: seq $2, $4, $5
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; MIPS64-LABEL: cmpeq:
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; MIPS64: xor $1, $4, $5
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; MIPS64: sltiu $1, $1, 1
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; MIPS64: dsll $1, $1, 32
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; MIPS64: jr $ra
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; MIPS64: dsrl $2, $1, 32
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%res = icmp eq i64 %a, %b
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%res2 = zext i1 %res to i64
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ret i64 %res2
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}
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define i64 @cmpeqi(i64 %a) nounwind {
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entry:
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; OCTEON-LABEL: cmpeqi:
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; OCTEON: jr $ra
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; OCTEON: seqi $2, $4, 42
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; MIPS64-LABEL: cmpeqi:
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; MIPS64: daddiu $1, $zero, 42
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; MIPS64: xor $1, $4, $1
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; MIPS64: sltiu $1, $1, 1
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; MIPS64: dsll $1, $1, 32
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; MIPS64: jr $ra
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; MIPS64: dsrl $2, $1, 32
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%res = icmp eq i64 %a, 42
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%res2 = zext i1 %res to i64
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ret i64 %res2
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}
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define i64 @cmpne(i64 %a, i64 %b) nounwind {
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entry:
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; OCTEON-LABEL: cmpne:
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; OCTEON: jr $ra
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; OCTEON: sne $2, $4, $5
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; MIPS64-LABEL: cmpne:
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; MIPS64: xor $1, $4, $5
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; MIPS64: sltu $1, $zero, $1
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; MIPS64: dsll $1, $1, 32
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; MIPS64: jr $ra
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; MIPS64: dsrl $2, $1, 32
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%res = icmp ne i64 %a, %b
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%res2 = zext i1 %res to i64
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ret i64 %res2
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}
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define i64 @cmpnei(i64 %a) nounwind {
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entry:
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; OCTEON-LABEL: cmpnei:
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; OCTEON: jr $ra
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; OCTEON: snei $2, $4, 42
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; MIPS64-LABEL: cmpnei:
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; MIPS64: daddiu $1, $zero, 42
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; MIPS64: xor $1, $4, $1
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; MIPS64: sltu $1, $zero, $1
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; MIPS64: dsll $1, $1, 32
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; MIPS64: jr $ra
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; MIPS64: dsrl $2, $1, 32
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%res = icmp ne i64 %a, 42
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%res2 = zext i1 %res to i64
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ret i64 %res2
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}
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