llvm-6502/test/CodeGen
Chris Lattner fd3f635103 Fix rdar://9289512 - not folding load into compare at -O0
The basic issue here is that bottom-up isel is matching the branch
and compare, and was failing to fold the load into the branch/compare
combo.  Fixing this (by allowing folding into any instruction of a
sequence that is selected) allows us to produce things like:


cmpb    $0, 52(%rax)
je      LBB4_2

instead of:

movb    52(%rax), %cl
cmpb    $0, %cl
je      LBB4_2

This makes the generated -O0 code run a bit faster, but also speeds up
compile time by putting less pressure on the register allocator and 
generating less code.

This was one of the biggest classes of missing load folding.  Implementing
this shrinks 176.gcc's c-decl.s (as a random example) by about 4% in (verbose-asm)
line count.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 06:35:44 +00:00
..
Alpha
ARM Fix divmod libcall lowering. Convert to {S|U}DIVREM first and then expand the node to a libcall. rdar://9280991 2011-04-16 03:08:26 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
MBlaze
Mips Re-enable test o32_cc_vararg.ll. 2011-04-15 22:23:09 +00:00
MSP430
PowerPC
PTX
SPARC
SystemZ
Thumb Follow up on r127913. Fix Thumb revsh isel. rdar://9286766 2011-04-14 23:27:44 +00:00
Thumb2 Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 2011-04-13 00:38:32 +00:00
X86 Fix rdar://9289512 - not folding load into compare at -O0 2011-04-17 06:35:44 +00:00
XCore