llvm-6502/test/CodeGen/ARM/unaligned_load_store.ll
Anton Korobeynikov 90cfc130d6 Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.
Even if they are suported by the core, they can be disabled
(this is just a configuration bit inside some register).

Allow unaligned memops on darwin and conservatively disallow them otherwise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 14:08:12 +00:00

29 lines
810 B
LLVM

; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=GENERIC
; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6
; RUN: llc < %s -mtriple=armv6-linux | FileCheck %s -check-prefix=GENERIC
; rdar://7113725
define arm_apcscc void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
entry:
; GENERIC: t:
; GENERIC: ldrb r2
; GENERIC: ldrb r3
; GENERIC: ldrb r12
; GENERIC: ldrb r1
; GENERIC: strb r1
; GENERIC: strb r12
; GENERIC: strb r3
; GENERIC: strb r2
; DARWIN_V6: t:
; DARWIN_V6: ldr r1
; DARWIN_V6: str r1
%__src1.i = bitcast i8* %b to i32* ; <i32*> [#uses=1]
%__dest2.i = bitcast i8* %a to i32* ; <i32*> [#uses=1]
%tmp.i = load i32* %__src1.i, align 1 ; <i32> [#uses=1]
store i32 %tmp.i, i32* %__dest2.i, align 1
ret void
}