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https://github.com/c64scene-ar/llvm-6502.git
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b52ba9f8a8
Stack is formed improperly for long structures passed as byval arguments for EABI mode. If we took AAPCS reference, we can found the next statements: A: "If the argument requires double-word alignment (8-byte), the NCRN (Next Core Register Number) is rounded up to the next even register number." (5.5 Parameter Passing, Stage C, C.3). B: "The alignment of an aggregate shall be the alignment of its most-aligned component." (4.3 Composite Types, 4.3.1 Aggregates). So if we have structure with doubles (9 double fields) and 3 Core unused registers (r1, r2, r3): caller should use r2 and r3 registers only. Currently r1,r2,r3 set is used, but it is invalid. Callee VA routine should also use r2 and r3 regs only. All is ok here. This behaviour is guessed by rounding up SP address with ADD+BFC operations. Fix: Main fix is in ARMTargetLowering::HandleByVal. If we detected AAPCS mode and 8 byte alignment, we waste odd registers then. P.S.: I also improved LDRB_POST_IMM regression test. Since ldrb instruction will not generated by current regression test after this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166018 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.5 KiB
LLVM
57 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s
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; Test that we correctly use registers and align elements when using va_arg
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%struct_t = type { double, double, double }
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@static_val = constant %struct_t { double 1.0, double 2.0, double 3.0 }
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_end(i8*) nounwind
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; CHECK: test_byval_8_bytes_alignment:
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define void @test_byval_8_bytes_alignment(i32 %i, ...) {
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entry:
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; CHECK: stm r0, {r1, r2, r3}
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%g = alloca i8*
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%g1 = bitcast i8** %g to i8*
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call void @llvm.va_start(i8* %g1)
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; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7
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; CHECK: bfc [[REG]], #0, #3
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%0 = va_arg i8** %g, double
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call void @llvm.va_end(i8* %g1)
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ret void
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}
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; CHECK: main:
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; CHECK: ldm r0, {r2, r3}
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define i32 @main() {
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entry:
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call void (i32, ...)* @test_byval_8_bytes_alignment(i32 555, %struct_t* byval @static_val)
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ret i32 0
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}
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declare void @f(double);
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; CHECK: test_byval_8_bytes_alignment_fixed_arg:
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; CHECK-NOT: str r1
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; CHECK: str r3, [sp, #12]
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; CHECK: str r2, [sp, #8]
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; CHECK-NOT: str r1
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define void @test_byval_8_bytes_alignment_fixed_arg(i32 %n1, %struct_t* byval %val) nounwind {
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entry:
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%a = getelementptr inbounds %struct_t* %val, i32 0, i32 0
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%0 = load double* %a
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call void (double)* @f(double %0)
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ret void
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}
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; CHECK: main_fixed_arg:
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; CHECK: ldm r0, {r2, r3}
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define i32 @main_fixed_arg() {
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entry:
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call void (i32, %struct_t*)* @test_byval_8_bytes_alignment_fixed_arg(i32 555, %struct_t* byval @static_val)
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ret i32 0
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}
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