llvm-6502/test/CodeGen/SystemZ/fp-move-11.ll
Ulrich Weigand cf0fa9b9dd [SystemZ] Add CodeGen support for scalar f64 ops in vector registers
The z13 vector facility includes some instructions that operate only on the
high f64 in a v2f64, effectively extending the FP register set from 16
to 32 registers.  It's still better to use the old instructions if the
operands happen to fit though, since the older instructions have a shorter
encoding.

Based on a patch by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236524 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 19:28:34 +00:00

111 lines
2.8 KiB
LLVM

; Test 32-bit floating-point loads for z13.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
; Test that we use LDE instead of LE - low end of the LE range.
define float @f1(float *%src) {
; CHECK-LABEL: f1:
; CHECK: lde %f0, 0(%r2)
; CHECK: br %r14
%val = load float, float *%src
ret float %val
}
; Test that we use LDE instead of LE - high end of the LE range.
define float @f2(float *%src) {
; CHECK-LABEL: f2:
; CHECK: lde %f0, 4092(%r2)
; CHECK: br %r14
%ptr = getelementptr float, float *%src, i64 1023
%val = load float, float *%ptr
ret float %val
}
; Check the next word up, which should use LEY instead of LDE.
define float @f3(float *%src) {
; CHECK-LABEL: f3:
; CHECK: ley %f0, 4096(%r2)
; CHECK: br %r14
%ptr = getelementptr float, float *%src, i64 1024
%val = load float, float *%ptr
ret float %val
}
; Check the high end of the aligned LEY range.
define float @f4(float *%src) {
; CHECK-LABEL: f4:
; CHECK: ley %f0, 524284(%r2)
; CHECK: br %r14
%ptr = getelementptr float, float *%src, i64 131071
%val = load float, float *%ptr
ret float %val
}
; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK.
define float @f5(float *%src) {
; CHECK-LABEL: f5:
; CHECK: agfi %r2, 524288
; CHECK: lde %f0, 0(%r2)
; CHECK: br %r14
%ptr = getelementptr float, float *%src, i64 131072
%val = load float, float *%ptr
ret float %val
}
; Check the high end of the negative aligned LEY range.
define float @f6(float *%src) {
; CHECK-LABEL: f6:
; CHECK: ley %f0, -4(%r2)
; CHECK: br %r14
%ptr = getelementptr float, float *%src, i64 -1
%val = load float, float *%ptr
ret float %val
}
; Check the low end of the LEY range.
define float @f7(float *%src) {
; CHECK-LABEL: f7:
; CHECK: ley %f0, -524288(%r2)
; CHECK: br %r14
%ptr = getelementptr float, float *%src, i64 -131072
%val = load float, float *%ptr
ret float %val
}
; Check the next word down, which needs separate address logic.
; Other sequences besides this one would be OK.
define float @f8(float *%src) {
; CHECK-LABEL: f8:
; CHECK: agfi %r2, -524292
; CHECK: lde %f0, 0(%r2)
; CHECK: br %r14
%ptr = getelementptr float, float *%src, i64 -131073
%val = load float, float *%ptr
ret float %val
}
; Check that LDE allows an index.
define float @f9(i64 %src, i64 %index) {
; CHECK-LABEL: f9:
; CHECK: lde %f0, 4092({{%r3,%r2|%r2,%r3}})
; CHECK: br %r14
%add1 = add i64 %src, %index
%add2 = add i64 %add1, 4092
%ptr = inttoptr i64 %add2 to float *
%val = load float, float *%ptr
ret float %val
}
; Check that LEY allows an index.
define float @f10(i64 %src, i64 %index) {
; CHECK-LABEL: f10:
; CHECK: ley %f0, 4096({{%r3,%r2|%r2,%r3}})
; CHECK: br %r14
%add1 = add i64 %src, %index
%add2 = add i64 %add1, 4096
%ptr = inttoptr i64 %add2 to float *
%val = load float, float *%ptr
ret float %val
}