llvm-6502/test/CodeGen/X86/vec_align_i256.ll
2013-03-14 23:49:44 +00:00

12 lines
294 B
LLVM

; RUN: llc < %s -mcpu=corei7-avx | FileCheck %s
; Make sure that we are not generating a movaps because the vector is aligned to 1.
;CHECK: @foo
;CHECK: xor
;CHECK-NEXT: vmovups
;CHECK-NEXT: ret
define void @foo() {
store <16 x i16> zeroinitializer, <16 x i16>* undef, align 1
ret void
}