mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
849 lines
30 KiB
C++
849 lines
30 KiB
C++
//===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly --------=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to PowerPC assembly language. This printer is
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// the output mechanism used by `llc'.
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//
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// Documentation at http://developer.apple.com/documentation/DeveloperTools/
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// Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asmprinter"
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#include "PPC.h"
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#include "PPCPredicates.h"
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#include "PPCTargetMachine.h"
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#include "PPCSubtarget.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfoImpls.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Target/Mangler.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegistry.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringSet.h"
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#include "llvm/ADT/SmallString.h"
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using namespace llvm;
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namespace {
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class PPCAsmPrinter : public AsmPrinter {
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protected:
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DenseMap<const MCSymbol*, const MCSymbol*> TOC;
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const PPCSubtarget &Subtarget;
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uint64_t LabelID;
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public:
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explicit PPCAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
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MCContext &Ctx, MCStreamer &Streamer,
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const MCAsmInfo *T)
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: AsmPrinter(O, TM, Ctx, Streamer, T),
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Subtarget(TM.getSubtarget<PPCSubtarget>()), LabelID(0) {}
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virtual const char *getPassName() const {
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return "PowerPC Assembly Printer";
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}
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PPCTargetMachine &getTM() {
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return static_cast<PPCTargetMachine&>(TM);
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}
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unsigned enumRegToMachineReg(unsigned enumReg) {
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switch (enumReg) {
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default: llvm_unreachable("Unhandled register!");
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case PPC::CR0: return 0;
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case PPC::CR1: return 1;
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case PPC::CR2: return 2;
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case PPC::CR3: return 3;
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case PPC::CR4: return 4;
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case PPC::CR5: return 5;
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case PPC::CR6: return 6;
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case PPC::CR7: return 7;
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}
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llvm_unreachable(0);
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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void printInstruction(const MachineInstr *MI);
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static const char *getRegisterName(unsigned RegNo);
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virtual void EmitInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO);
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/// stripRegisterPrefix - This method strips the character prefix from a
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/// register name so that only the number is left. Used by for linux asm.
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const char *stripRegisterPrefix(const char *RegName) {
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switch (RegName[0]) {
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case 'r':
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case 'f':
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case 'v': return RegName + 1;
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case 'c': if (RegName[1] == 'r') return RegName + 2;
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}
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return RegName;
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}
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/// printRegister - Print register according to target requirements.
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///
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void printRegister(const MachineOperand &MO, bool R0AsZero) {
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unsigned RegNo = MO.getReg();
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assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && "Not physreg??");
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// If we should use 0 for R0.
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if (R0AsZero && RegNo == PPC::R0) {
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O << "0";
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return;
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}
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const char *RegName = getRegisterName(RegNo);
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// Linux assembler (Others?) does not take register mnemonics.
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// FIXME - What about special registers used in mfspr/mtspr?
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if (!Subtarget.isDarwin()) RegName = stripRegisterPrefix(RegName);
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O << RegName;
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}
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void printOperand(const MachineInstr *MI, unsigned OpNo) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.isReg()) {
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printRegister(MO, false);
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} else if (MO.isImm()) {
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O << MO.getImm();
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} else {
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printOp(MO);
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}
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}
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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void printS5ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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char value = MI->getOperand(OpNo).getImm();
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value = (value << (32-5)) >> (32-5);
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O << (int)value;
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}
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void printU5ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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unsigned char value = MI->getOperand(OpNo).getImm();
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assert(value <= 31 && "Invalid u5imm argument!");
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O << (unsigned int)value;
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}
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void printU6ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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unsigned char value = MI->getOperand(OpNo).getImm();
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assert(value <= 63 && "Invalid u6imm argument!");
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O << (unsigned int)value;
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}
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void printS16ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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O << (short)MI->getOperand(OpNo).getImm();
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}
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void printU16ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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O << (unsigned short)MI->getOperand(OpNo).getImm();
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}
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void printS16X4ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm()) {
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O << (short)(MI->getOperand(OpNo).getImm()*4);
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} else {
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O << "lo16(";
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printOp(MI->getOperand(OpNo));
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if (TM.getRelocationModel() == Reloc::PIC_)
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O << "-\"L" << getFunctionNumber() << "$pb\")";
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else
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O << ')';
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}
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}
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void printBranchOperand(const MachineInstr *MI, unsigned OpNo) {
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// Branches can take an immediate operand. This is used by the branch
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// selection pass to print $+8, an eight byte displacement from the PC.
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if (MI->getOperand(OpNo).isImm()) {
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O << "$+" << MI->getOperand(OpNo).getImm()*4;
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} else {
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printOp(MI->getOperand(OpNo));
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}
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}
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void printCallOperand(const MachineInstr *MI, unsigned OpNo) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (TM.getRelocationModel() != Reloc::Static) {
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if (MO.getType() == MachineOperand::MO_GlobalAddress) {
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GlobalValue *GV = MO.getGlobal();
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if (GV->isDeclaration() || GV->isWeakForLinker()) {
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// Dynamically-resolved functions need a stub for the function.
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MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$stub");
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MCSymbol *&StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>().getFnStubEntry(Sym);
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if (StubSym == 0)
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StubSym = GetGlobalValueSymbol(GV);
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O << *Sym;
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return;
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}
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}
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if (MO.getType() == MachineOperand::MO_ExternalSymbol) {
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SmallString<128> TempNameStr;
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TempNameStr += StringRef(MO.getSymbolName());
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TempNameStr += StringRef("$stub");
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MCSymbol *Sym = GetExternalSymbolSymbol(TempNameStr.str());
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MCSymbol *&StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>().getFnStubEntry(Sym);
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if (StubSym == 0)
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StubSym = GetExternalSymbolSymbol(MO.getSymbolName());
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O << *Sym;
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return;
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}
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}
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printOp(MI->getOperand(OpNo));
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}
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void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo) {
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O << (int)MI->getOperand(OpNo).getImm()*4;
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}
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void printPICLabel(const MachineInstr *MI, unsigned OpNo) {
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O << "\"L" << getFunctionNumber() << "$pb\"\n";
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O << "\"L" << getFunctionNumber() << "$pb\":";
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}
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void printSymbolHi(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm()) {
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printS16ImmOperand(MI, OpNo);
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} else {
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if (Subtarget.isDarwin()) O << "ha16(";
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printOp(MI->getOperand(OpNo));
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if (TM.getRelocationModel() == Reloc::PIC_)
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O << "-\"L" << getFunctionNumber() << "$pb\"";
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if (Subtarget.isDarwin())
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O << ')';
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else
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O << "@ha";
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}
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}
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void printSymbolLo(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm()) {
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printS16ImmOperand(MI, OpNo);
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} else {
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if (Subtarget.isDarwin()) O << "lo16(";
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printOp(MI->getOperand(OpNo));
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if (TM.getRelocationModel() == Reloc::PIC_)
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O << "-\"L" << getFunctionNumber() << "$pb\"";
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if (Subtarget.isDarwin())
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O << ')';
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else
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O << "@l";
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}
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}
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void printcrbitm(const MachineInstr *MI, unsigned OpNo) {
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unsigned CCReg = MI->getOperand(OpNo).getReg();
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unsigned RegNo = enumRegToMachineReg(CCReg);
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O << (0x80 >> RegNo);
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}
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// The new addressing mode printers.
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void printMemRegImm(const MachineInstr *MI, unsigned OpNo) {
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printSymbolLo(MI, OpNo);
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O << '(';
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if (MI->getOperand(OpNo+1).isReg() &&
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MI->getOperand(OpNo+1).getReg() == PPC::R0)
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O << "0";
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else
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printOperand(MI, OpNo+1);
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O << ')';
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}
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void printMemRegImmShifted(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm())
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printS16X4ImmOperand(MI, OpNo);
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else
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printSymbolLo(MI, OpNo);
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O << '(';
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if (MI->getOperand(OpNo+1).isReg() &&
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MI->getOperand(OpNo+1).getReg() == PPC::R0)
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O << "0";
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else
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printOperand(MI, OpNo+1);
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O << ')';
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}
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void printMemRegReg(const MachineInstr *MI, unsigned OpNo) {
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// When used as the base register, r0 reads constant zero rather than
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// the value contained in the register. For this reason, the darwin
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// assembler requires that we print r0 as 0 (no r) when used as the base.
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const MachineOperand &MO = MI->getOperand(OpNo);
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printRegister(MO, true);
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O << ", ";
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printOperand(MI, OpNo+1);
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}
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void printTOCEntryLabel(const MachineInstr *MI, unsigned OpNo) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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assert(MO.getType() == MachineOperand::MO_GlobalAddress);
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const MCSymbol *Sym = GetGlobalValueSymbol(MO.getGlobal());
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// Map symbol -> label of TOC entry.
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const MCSymbol *&TOCEntry = TOC[Sym];
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if (TOCEntry == 0)
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TOCEntry = OutContext.
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GetOrCreateSymbol(StringRef(MAI->getPrivateGlobalPrefix()) + "C" +
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Twine(LabelID++));
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O << *TOCEntry << "@toc";
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}
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void printPredicateOperand(const MachineInstr *MI, unsigned OpNo,
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const char *Modifier);
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};
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/// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
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class PPCLinuxAsmPrinter : public PPCAsmPrinter {
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public:
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explicit PPCLinuxAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
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MCContext &Ctx, MCStreamer &Streamer,
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const MCAsmInfo *T)
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: PPCAsmPrinter(O, TM, Ctx, Streamer, T) {}
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virtual const char *getPassName() const {
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return "Linux PPC Assembly Printer";
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}
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bool doFinalization(Module &M);
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virtual void EmitFunctionEntryLabel();
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<MachineModuleInfo>();
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AU.addRequired<DwarfWriter>();
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PPCAsmPrinter::getAnalysisUsage(AU);
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}
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};
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/// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac
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/// OS X
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class PPCDarwinAsmPrinter : public PPCAsmPrinter {
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formatted_raw_ostream &OS;
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public:
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explicit PPCDarwinAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
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MCContext &Ctx, MCStreamer &Streamer,
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const MCAsmInfo *T)
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: PPCAsmPrinter(O, TM, Ctx, Streamer, T), OS(O) {}
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virtual const char *getPassName() const {
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return "Darwin PPC Assembly Printer";
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}
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bool doFinalization(Module &M);
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void EmitStartOfAsmFile(Module &M);
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void EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs);
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<MachineModuleInfo>();
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AU.addRequired<DwarfWriter>();
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PPCAsmPrinter::getAnalysisUsage(AU);
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}
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};
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} // end of anonymous namespace
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// Include the auto-generated portion of the assembly writer
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#include "PPCGenAsmWriter.inc"
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void PPCAsmPrinter::printOp(const MachineOperand &MO) {
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switch (MO.getType()) {
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case MachineOperand::MO_Immediate:
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llvm_unreachable("printOp() does not handle immediate values");
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case MachineOperand::MO_MachineBasicBlock:
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O << *MO.getMBB()->getSymbol(OutContext);
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return;
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case MachineOperand::MO_JumpTableIndex:
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O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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// FIXME: PIC relocation model
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return;
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case MachineOperand::MO_ConstantPoolIndex:
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O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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return;
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case MachineOperand::MO_BlockAddress:
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O << *GetBlockAddressSymbol(MO.getBlockAddress());
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return;
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case MachineOperand::MO_ExternalSymbol: {
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// Computing the address of an external symbol, not calling it.
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if (TM.getRelocationModel() == Reloc::Static) {
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O << *GetExternalSymbolSymbol(MO.getSymbolName());
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return;
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}
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MCSymbol *NLPSym =
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OutContext.GetOrCreateSymbol(StringRef(MAI->getGlobalPrefix())+
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MO.getSymbolName()+"$non_lazy_ptr");
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MCSymbol *&StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(NLPSym);
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if (StubSym == 0)
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StubSym = GetExternalSymbolSymbol(MO.getSymbolName());
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O << *NLPSym;
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return;
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}
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case MachineOperand::MO_GlobalAddress: {
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// Computing the address of a global symbol, not calling it.
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GlobalValue *GV = MO.getGlobal();
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MCSymbol *SymToPrint;
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// External or weakly linked global variables need non-lazily-resolved stubs
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if (TM.getRelocationModel() != Reloc::Static &&
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(GV->isDeclaration() || GV->isWeakForLinker())) {
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if (!GV->hasHiddenVisibility()) {
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SymToPrint = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
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MCSymbol *&StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(SymToPrint);
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if (StubSym == 0)
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StubSym = GetGlobalValueSymbol(GV);
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} else if (GV->isDeclaration() || GV->hasCommonLinkage() ||
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GV->hasAvailableExternallyLinkage()) {
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SymToPrint = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
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MCSymbol *&StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>().
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getHiddenGVStubEntry(SymToPrint);
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if (StubSym == 0)
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StubSym = GetGlobalValueSymbol(GV);
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} else {
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SymToPrint = GetGlobalValueSymbol(GV);
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}
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} else {
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SymToPrint = GetGlobalValueSymbol(GV);
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}
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O << *SymToPrint;
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printOffset(MO.getOffset());
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return;
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}
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default:
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O << "<unknown operand type: " << MO.getType() << ">";
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return;
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}
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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case 'c': // Don't print "$" before a global var name or constant.
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// PPC never has a prefix.
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printOperand(MI, OpNo);
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return false;
|
|
case 'L': // Write second word of DImode reference.
|
|
// Verify that this operand has two consecutive registers.
|
|
if (!MI->getOperand(OpNo).isReg() ||
|
|
OpNo+1 == MI->getNumOperands() ||
|
|
!MI->getOperand(OpNo+1).isReg())
|
|
return true;
|
|
++OpNo; // Return the high-part.
|
|
break;
|
|
case 'I':
|
|
// Write 'i' if an integer constant, otherwise nothing. Used to print
|
|
// addi vs add, etc.
|
|
if (MI->getOperand(OpNo).isImm())
|
|
O << "i";
|
|
return false;
|
|
}
|
|
}
|
|
|
|
printOperand(MI, OpNo);
|
|
return false;
|
|
}
|
|
|
|
// At the moment, all inline asm memory operands are a single register.
|
|
// In any case, the output of this routine should always be just one
|
|
// assembler operand.
|
|
|
|
bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
|
|
unsigned AsmVariant,
|
|
const char *ExtraCode) {
|
|
if (ExtraCode && ExtraCode[0])
|
|
return true; // Unknown modifier.
|
|
assert (MI->getOperand(OpNo).isReg());
|
|
O << "0(";
|
|
printOperand(MI, OpNo);
|
|
O << ")";
|
|
return false;
|
|
}
|
|
|
|
void PPCAsmPrinter::printPredicateOperand(const MachineInstr *MI, unsigned OpNo,
|
|
const char *Modifier) {
|
|
assert(Modifier && "Must specify 'cc' or 'reg' as predicate op modifier!");
|
|
unsigned Code = MI->getOperand(OpNo).getImm();
|
|
if (!strcmp(Modifier, "cc")) {
|
|
switch ((PPC::Predicate)Code) {
|
|
case PPC::PRED_ALWAYS: return; // Don't print anything for always.
|
|
case PPC::PRED_LT: O << "lt"; return;
|
|
case PPC::PRED_LE: O << "le"; return;
|
|
case PPC::PRED_EQ: O << "eq"; return;
|
|
case PPC::PRED_GE: O << "ge"; return;
|
|
case PPC::PRED_GT: O << "gt"; return;
|
|
case PPC::PRED_NE: O << "ne"; return;
|
|
case PPC::PRED_UN: O << "un"; return;
|
|
case PPC::PRED_NU: O << "nu"; return;
|
|
}
|
|
|
|
} else {
|
|
assert(!strcmp(Modifier, "reg") &&
|
|
"Need to specify 'cc' or 'reg' as predicate op modifier!");
|
|
// Don't print the register for 'always'.
|
|
if (Code == PPC::PRED_ALWAYS) return;
|
|
printOperand(MI, OpNo+1);
|
|
}
|
|
}
|
|
|
|
|
|
/// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
|
|
/// the current output stream.
|
|
///
|
|
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
|
|
// Check for slwi/srwi mnemonics.
|
|
if (MI->getOpcode() == PPC::RLWINM) {
|
|
unsigned char SH = MI->getOperand(2).getImm();
|
|
unsigned char MB = MI->getOperand(3).getImm();
|
|
unsigned char ME = MI->getOperand(4).getImm();
|
|
bool useSubstituteMnemonic = false;
|
|
if (SH <= 31 && MB == 0 && ME == (31-SH)) {
|
|
O << "\tslwi "; useSubstituteMnemonic = true;
|
|
}
|
|
if (SH <= 31 && MB == (32-SH) && ME == 31) {
|
|
O << "\tsrwi "; useSubstituteMnemonic = true;
|
|
SH = 32-SH;
|
|
}
|
|
if (useSubstituteMnemonic) {
|
|
printOperand(MI, 0);
|
|
O << ", ";
|
|
printOperand(MI, 1);
|
|
O << ", " << (unsigned int)SH;
|
|
OutStreamer.AddBlankLine();
|
|
return;
|
|
}
|
|
}
|
|
|
|
if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
|
|
MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
|
|
O << "\tmr ";
|
|
printOperand(MI, 0);
|
|
O << ", ";
|
|
printOperand(MI, 1);
|
|
OutStreamer.AddBlankLine();
|
|
return;
|
|
}
|
|
|
|
if (MI->getOpcode() == PPC::RLDICR) {
|
|
unsigned char SH = MI->getOperand(2).getImm();
|
|
unsigned char ME = MI->getOperand(3).getImm();
|
|
// rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH
|
|
if (63-SH == ME) {
|
|
O << "\tsldi ";
|
|
printOperand(MI, 0);
|
|
O << ", ";
|
|
printOperand(MI, 1);
|
|
O << ", " << (unsigned int)SH;
|
|
OutStreamer.AddBlankLine();
|
|
return;
|
|
}
|
|
}
|
|
|
|
printInstruction(MI);
|
|
OutStreamer.AddBlankLine();
|
|
}
|
|
|
|
void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
|
|
if (!Subtarget.isPPC64()) // linux/ppc32 - Normal entry label.
|
|
return AsmPrinter::EmitFunctionEntryLabel();
|
|
|
|
// Emit an official procedure descriptor.
|
|
// FIXME 64-bit SVR4: Use MCSection here!
|
|
O << "\t.section\t\".opd\",\"aw\"\n";
|
|
O << "\t.align 3\n";
|
|
OutStreamer.EmitLabel(CurrentFnSym);
|
|
O << "\t.quad .L." << *CurrentFnSym << ",.TOC.@tocbase\n";
|
|
O << "\t.previous\n";
|
|
O << ".L." << *CurrentFnSym << ":\n";
|
|
}
|
|
|
|
|
|
bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
|
|
const TargetData *TD = TM.getTargetData();
|
|
|
|
bool isPPC64 = TD->getPointerSizeInBits() == 64;
|
|
|
|
if (isPPC64 && !TOC.empty()) {
|
|
// FIXME 64-bit SVR4: Use MCSection here?
|
|
O << "\t.section\t\".toc\",\"aw\"\n";
|
|
|
|
// FIXME: This is nondeterminstic!
|
|
for (DenseMap<const MCSymbol*, const MCSymbol*>::iterator I = TOC.begin(),
|
|
E = TOC.end(); I != E; ++I) {
|
|
O << *I->second << ":\n";
|
|
O << "\t.tc " << *I->first << "[TC]," << *I->first << '\n';
|
|
}
|
|
}
|
|
|
|
return AsmPrinter::doFinalization(M);
|
|
}
|
|
|
|
void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
|
|
static const char *const CPUDirectives[] = {
|
|
"",
|
|
"ppc",
|
|
"ppc601",
|
|
"ppc602",
|
|
"ppc603",
|
|
"ppc7400",
|
|
"ppc750",
|
|
"ppc970",
|
|
"ppc64"
|
|
};
|
|
|
|
unsigned Directive = Subtarget.getDarwinDirective();
|
|
if (Subtarget.isGigaProcessor() && Directive < PPC::DIR_970)
|
|
Directive = PPC::DIR_970;
|
|
if (Subtarget.hasAltivec() && Directive < PPC::DIR_7400)
|
|
Directive = PPC::DIR_7400;
|
|
if (Subtarget.isPPC64() && Directive < PPC::DIR_970)
|
|
Directive = PPC::DIR_64;
|
|
assert(Directive <= PPC::DIR_64 && "Directive out of range.");
|
|
O << "\t.machine " << CPUDirectives[Directive] << '\n';
|
|
|
|
// Prime text sections so they are adjacent. This reduces the likelihood a
|
|
// large data or debug section causes a branch to exceed 16M limit.
|
|
TargetLoweringObjectFileMachO &TLOFMacho =
|
|
static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
|
|
OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
|
|
if (TM.getRelocationModel() == Reloc::PIC_) {
|
|
OutStreamer.SwitchSection(
|
|
TLOFMacho.getMachOSection("__TEXT", "__picsymbolstub1",
|
|
MCSectionMachO::S_SYMBOL_STUBS |
|
|
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
|
|
32, SectionKind::getText()));
|
|
} else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) {
|
|
OutStreamer.SwitchSection(
|
|
TLOFMacho.getMachOSection("__TEXT","__symbol_stub1",
|
|
MCSectionMachO::S_SYMBOL_STUBS |
|
|
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
|
|
16, SectionKind::getText()));
|
|
}
|
|
OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
|
|
}
|
|
|
|
static const MCSymbol *GetLazyPtr(const MCSymbol *Sym, MCContext &Ctx) {
|
|
// Remove $stub suffix, add $lazy_ptr.
|
|
SmallString<128> TmpStr(Sym->getName().begin(), Sym->getName().end()-5);
|
|
TmpStr += "$lazy_ptr";
|
|
return Ctx.GetOrCreateSymbol(TmpStr.str());
|
|
}
|
|
|
|
static const MCSymbol *GetAnonSym(const MCSymbol *Sym, MCContext &Ctx) {
|
|
// Add $tmp suffix to $stub, yielding $stub$tmp.
|
|
SmallString<128> TmpStr(Sym->getName().begin(), Sym->getName().end());
|
|
TmpStr += "$tmp";
|
|
return Ctx.GetOrCreateSymbol(TmpStr.str());
|
|
}
|
|
|
|
void PPCDarwinAsmPrinter::
|
|
EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) {
|
|
bool isPPC64 = TM.getTargetData()->getPointerSizeInBits() == 64;
|
|
|
|
TargetLoweringObjectFileMachO &TLOFMacho =
|
|
static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
|
|
|
|
// .lazy_symbol_pointer
|
|
const MCSection *LSPSection = TLOFMacho.getLazySymbolPointerSection();
|
|
|
|
// Output stubs for dynamically-linked functions
|
|
if (TM.getRelocationModel() == Reloc::PIC_) {
|
|
const MCSection *StubSection =
|
|
TLOFMacho.getMachOSection("__TEXT", "__picsymbolstub1",
|
|
MCSectionMachO::S_SYMBOL_STUBS |
|
|
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
|
|
32, SectionKind::getText());
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
OutStreamer.SwitchSection(StubSection);
|
|
EmitAlignment(4);
|
|
|
|
const MCSymbol *Stub = Stubs[i].first;
|
|
const MCSymbol *RawSym = Stubs[i].second;
|
|
const MCSymbol *LazyPtr = GetLazyPtr(Stub, OutContext);
|
|
const MCSymbol *AnonSymbol = GetAnonSym(Stub, OutContext);
|
|
|
|
O << *Stub << ":\n";
|
|
O << "\t.indirect_symbol " << *RawSym << '\n';
|
|
O << "\tmflr r0\n";
|
|
O << "\tbcl 20,31," << *AnonSymbol << '\n';
|
|
O << *AnonSymbol << ":\n";
|
|
O << "\tmflr r11\n";
|
|
O << "\taddis r11,r11,ha16(" << *LazyPtr << '-' << *AnonSymbol
|
|
<< ")\n";
|
|
O << "\tmtlr r0\n";
|
|
O << (isPPC64 ? "\tldu" : "\tlwzu") << " r12,lo16(" << *LazyPtr
|
|
<< '-' << *AnonSymbol << ")(r11)\n";
|
|
O << "\tmtctr r12\n";
|
|
O << "\tbctr\n";
|
|
|
|
OutStreamer.SwitchSection(LSPSection);
|
|
O << *LazyPtr << ":\n";
|
|
O << "\t.indirect_symbol " << *RawSym << '\n';
|
|
O << (isPPC64 ? "\t.quad" : "\t.long") << " dyld_stub_binding_helper\n";
|
|
}
|
|
O << '\n';
|
|
return;
|
|
}
|
|
|
|
const MCSection *StubSection =
|
|
TLOFMacho.getMachOSection("__TEXT","__symbol_stub1",
|
|
MCSectionMachO::S_SYMBOL_STUBS |
|
|
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
|
|
16, SectionKind::getText());
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
const MCSymbol *Stub = Stubs[i].first;
|
|
const MCSymbol *RawSym = Stubs[i].second;
|
|
const MCSymbol *LazyPtr = GetLazyPtr(Stub, OutContext);
|
|
|
|
OutStreamer.SwitchSection(StubSection);
|
|
EmitAlignment(4);
|
|
O << *Stub << ":\n";
|
|
O << "\t.indirect_symbol " << *RawSym << '\n';
|
|
O << "\tlis r11,ha16(" << *LazyPtr << ")\n";
|
|
O << (isPPC64 ? "\tldu" : "\tlwzu") << " r12,lo16(" << *LazyPtr
|
|
<< ")(r11)\n";
|
|
O << "\tmtctr r12\n";
|
|
O << "\tbctr\n";
|
|
OutStreamer.SwitchSection(LSPSection);
|
|
O << *LazyPtr << ":\n";
|
|
O << "\t.indirect_symbol " << *RawSym << '\n';
|
|
O << (isPPC64 ? "\t.quad" : "\t.long") << " dyld_stub_binding_helper\n";
|
|
}
|
|
|
|
O << '\n';
|
|
}
|
|
|
|
|
|
bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
|
|
bool isPPC64 = TM.getTargetData()->getPointerSizeInBits() == 64;
|
|
|
|
// Darwin/PPC always uses mach-o.
|
|
TargetLoweringObjectFileMachO &TLOFMacho =
|
|
static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
|
|
MachineModuleInfoMachO &MMIMacho =
|
|
MMI->getObjFileInfo<MachineModuleInfoMachO>();
|
|
|
|
MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetFnStubList();
|
|
if (!Stubs.empty())
|
|
EmitFunctionStubs(Stubs);
|
|
|
|
if (MAI->doesSupportExceptionHandling() && MMI) {
|
|
// Add the (possibly multiple) personalities to the set of global values.
|
|
// Only referenced functions get into the Personalities list.
|
|
const std::vector<Function *> &Personalities = MMI->getPersonalities();
|
|
for (std::vector<Function *>::const_iterator I = Personalities.begin(),
|
|
E = Personalities.end(); I != E; ++I) {
|
|
if (*I) {
|
|
MCSymbol *NLPSym = GetSymbolWithGlobalValueBase(*I, "$non_lazy_ptr");
|
|
MCSymbol *&StubSym = MMIMacho.getGVStubEntry(NLPSym);
|
|
StubSym = GetGlobalValueSymbol(*I);
|
|
}
|
|
}
|
|
}
|
|
|
|
// Output stubs for dynamically-linked functions.
|
|
Stubs = MMIMacho.GetGVStubList();
|
|
|
|
// Output macho stubs for external and common global variables.
|
|
if (!Stubs.empty()) {
|
|
// Switch with ".non_lazy_symbol_pointer" directive.
|
|
OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
|
|
EmitAlignment(isPPC64 ? 3 : 2);
|
|
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
O << *Stubs[i].first << ":\n";
|
|
O << "\t.indirect_symbol " << *Stubs[i].second << '\n';
|
|
O << (isPPC64 ? "\t.quad\t0\n" : "\t.long\t0\n");
|
|
}
|
|
}
|
|
|
|
Stubs = MMIMacho.GetHiddenGVStubList();
|
|
if (!Stubs.empty()) {
|
|
OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
|
|
EmitAlignment(isPPC64 ? 3 : 2);
|
|
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
O << *Stubs[i].first << ":\n";
|
|
O << (isPPC64 ? "\t.quad\t" : "\t.long\t") << *Stubs[i].second << '\n';
|
|
}
|
|
}
|
|
|
|
// Funny Darwin hack: This flag tells the linker that no global symbols
|
|
// contain code that falls through to other global symbols (e.g. the obvious
|
|
// implementation of multiple entry points). If this doesn't occur, the
|
|
// linker can safely perform dead code stripping. Since LLVM never generates
|
|
// code that does this, it is always safe to set.
|
|
OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
|
|
|
|
return AsmPrinter::doFinalization(M);
|
|
}
|
|
|
|
|
|
|
|
/// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
|
|
/// for a MachineFunction to the given output stream, in a format that the
|
|
/// Darwin assembler can deal with.
|
|
///
|
|
static AsmPrinter *createPPCAsmPrinterPass(formatted_raw_ostream &o,
|
|
TargetMachine &tm,
|
|
MCContext &Ctx, MCStreamer &Streamer,
|
|
const MCAsmInfo *tai) {
|
|
const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>();
|
|
|
|
if (Subtarget->isDarwin())
|
|
return new PPCDarwinAsmPrinter(o, tm, Ctx, Streamer, tai);
|
|
return new PPCLinuxAsmPrinter(o, tm, Ctx, Streamer, tai);
|
|
}
|
|
|
|
// Force static initialization.
|
|
extern "C" void LLVMInitializePowerPCAsmPrinter() {
|
|
TargetRegistry::RegisterAsmPrinter(ThePPC32Target, createPPCAsmPrinterPass);
|
|
TargetRegistry::RegisterAsmPrinter(ThePPC64Target, createPPCAsmPrinterPass);
|
|
}
|