Elena Demikhovsky ae1ae2c3a1 Masked Vector Load and Store Intrinsics. ... Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores. Added SDNodes for masked operations and lowering patterns for X86 code generator. Examples: <16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask) declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask) Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch. http://reviews.llvm.org/D6191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222632 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-23 08:07:43 +00:00
..
CostTable.h	Add a overload to CostTable which allows it to infer the size of the table.	2013-08-09 19:33:32 +00:00
Target.td	Support REG_SEQUENCE in tablegen.	2014-11-02 23:46:51 +00:00
TargetCallingConv.h	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
TargetCallingConv.td	[mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC	2014-11-07 11:43:49 +00:00
TargetFrameLowering.h	Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore SEH pseudo ops in X86 JIT emitter.	2014-06-25 12:41:52 +00:00
TargetInstrInfo.h	Add Forward Control-Flow Integrity.	2014-11-11 21:08:02 +00:00
TargetIntrinsicInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetItinerary.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetLibraryInfo.h	Add fortified (__*_chk) library functions to TLI (NFC)	2014-11-12 21:23:34 +00:00
TargetLowering.h	DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal.	2014-11-21 06:39:58 +00:00
TargetLoweringObjectFile.h	Remove a bit of dead code.	2014-11-12 01:27:22 +00:00
TargetMachine.h	This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively	2014-11-13 09:26:31 +00:00
TargetOpcodes.h	[stack protector] Fix a potential security bug in stack protector where the	2014-07-25 19:31:34 +00:00
TargetOptions.h	Add Forward Control-Flow Integrity.	2014-11-11 21:08:02 +00:00
TargetRegisterInfo.h	Introduce register dump helper	2014-11-19 19:46:11 +00:00
TargetSchedule.td	Move Post RA Scheduling flag bit into SchedMachineModel	2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td	Masked Vector Load and Store Intrinsics.	2014-11-23 08:07:43 +00:00
TargetSelectionDAGInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetSubtargetInfo.h	[PBQP] Replace PBQPBuilder with composable constraints (PBQPRAConstraint).	2014-10-09 18:20:51 +00:00