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This matches the format produced by the AMD proprietary driver. //==================================================================// // Shell script for converting .ll test cases: (Pass the .ll files you want to convert to this script as arguments). //==================================================================// ; This was necessary on my system so that A-Z in sed would match only ; upper case. I'm not sure why. export LC_ALL='C' TEST_FILES="$*" MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r` for f in $TEST_FILES; do # Check that there are SI tests: grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f if [ $? -eq 0 ]; then for match in $MATCHES; do sed -i -e "s/\([ :]$match\)/\L\1/" $f done # Try to get check lines with partial instruction names sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f fi done sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll //==================================================================// // Shell script for converting .td files (run this last) //==================================================================// export LC_ALL='C' sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
132 lines
4.6 KiB
LLVM
132 lines
4.6 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare float @llvm.ceil.f32(float) nounwind readnone
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declare <2 x float> @llvm.ceil.v2f32(<2 x float>) nounwind readnone
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declare <3 x float> @llvm.ceil.v3f32(<3 x float>) nounwind readnone
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declare <4 x float> @llvm.ceil.v4f32(<4 x float>) nounwind readnone
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declare <8 x float> @llvm.ceil.v8f32(<8 x float>) nounwind readnone
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declare <16 x float> @llvm.ceil.v16f32(<16 x float>) nounwind readnone
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; FUNC-LABEL: {{^}}fceil_f32:
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; SI: v_ceil_f32_e32
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+\.[XYZW]]]
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; EG: CEIL {{\*? *}}[[RESULT]]
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define void @fceil_f32(float addrspace(1)* %out, float %x) {
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%y = call float @llvm.ceil.f32(float %x) nounwind readnone
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store float %y, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fceil_v2f32:
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+]]{{\.[XYZW]}}
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; EG: CEIL {{\*? *}}[[RESULT]]
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; EG: CEIL {{\*? *}}[[RESULT]]
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define void @fceil_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %x) {
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%y = call <2 x float> @llvm.ceil.v2f32(<2 x float> %x) nounwind readnone
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store <2 x float> %y, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fceil_v3f32:
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; FIXME-SI: v_ceil_f32_e32
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; FIXME-SI: v_ceil_f32_e32
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; FIXME-SI: v_ceil_f32_e32
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; FIXME-EG: v3 is treated as v2 and v1, hence 2 stores
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT1:T[0-9]+]]{{\.[XYZW]}}
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT2:T[0-9]+]]{{\.[XYZW]}}
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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define void @fceil_v3f32(<3 x float> addrspace(1)* %out, <3 x float> %x) {
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%y = call <3 x float> @llvm.ceil.v3f32(<3 x float> %x) nounwind readnone
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store <3 x float> %y, <3 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fceil_v4f32:
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+]]{{\.[XYZW]}}
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; EG: CEIL {{\*? *}}[[RESULT]]
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; EG: CEIL {{\*? *}}[[RESULT]]
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; EG: CEIL {{\*? *}}[[RESULT]]
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; EG: CEIL {{\*? *}}[[RESULT]]
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define void @fceil_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %x) {
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%y = call <4 x float> @llvm.ceil.v4f32(<4 x float> %x) nounwind readnone
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store <4 x float> %y, <4 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fceil_v8f32:
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT1:T[0-9]+]]{{\.[XYZW]}}
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT2:T[0-9]+]]{{\.[XYZW]}}
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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define void @fceil_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %x) {
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%y = call <8 x float> @llvm.ceil.v8f32(<8 x float> %x) nounwind readnone
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store <8 x float> %y, <8 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fceil_v16f32:
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; SI: v_ceil_f32_e32
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT1:T[0-9]+]]{{\.[XYZW]}}
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT2:T[0-9]+]]{{\.[XYZW]}}
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT3:T[0-9]+]]{{\.[XYZW]}}
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; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT4:T[0-9]+]]{{\.[XYZW]}}
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT2]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT3]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT3]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT3]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT3]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT4]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT4]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT4]]
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; EG-DAG: CEIL {{\*? *}}[[RESULT4]]
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define void @fceil_v16f32(<16 x float> addrspace(1)* %out, <16 x float> %x) {
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%y = call <16 x float> @llvm.ceil.v16f32(<16 x float> %x) nounwind readnone
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store <16 x float> %y, <16 x float> addrspace(1)* %out
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ret void
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}
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