llvm-6502/test/CodeGen
Eric Christopher 169e1552e7 The change for PR9190 wasn't quite right. We need to avoid making the
transformation if we can't legally create a build vector of the correct
type. Check that we can make the transformation first, and add a TODO to
refactor this code with similar cases.

Fixes: PR9223 and rdar://9000350


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-16 01:10:03 +00:00
..
Alpha
ARM PR9139: Specify ARM/Darwin triple for vector-DAGCombine.ll test. 2011-02-14 22:12:50 +00:00
Blackfin
CBackend
CellSPU fix visitShift to properly zero extend the shift amount if the provided operand 2011-02-13 09:02:52 +00:00
CPP
Generic A fix for 9165. 2011-02-12 14:40:33 +00:00
MBlaze fix visitShift to properly zero extend the shift amount if the provided operand 2011-02-13 09:02:52 +00:00
Mips Disable this test for now... 2011-02-11 02:59:08 +00:00
MSP430 Enhance ComputeMaskedBits to know that aligned frameindexes 2011-02-13 22:25:43 +00:00
PowerPC
PTX ptx: add passing parameter to kernel functions 2011-02-10 12:01:24 +00:00
SPARC Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend. 2011-02-12 19:02:33 +00:00
SystemZ
Thumb Sorry, several patches in one. 2011-01-20 08:34:58 +00:00
Thumb2 Move a test that ended up in the wrong place. 2011-02-05 04:15:50 +00:00
X86 The change for PR9190 wasn't quite right. We need to avoid making the 2011-02-16 01:10:03 +00:00
XCore Add intrinsic for setc instruction on the XCore. 2011-02-09 13:22:12 +00:00