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1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
72 lines
2.3 KiB
C++
72 lines
2.3 KiB
C++
//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
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#define LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
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#include "AMDGPUFrameLowering.h"
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#include "AMDGPUInstrInfo.h"
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#include "AMDGPUIntrinsicInfo.h"
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#include "AMDGPUSubtarget.h"
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#include "R600ISelLowering.h"
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#include "llvm/IR/DataLayout.h"
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namespace llvm {
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//===----------------------------------------------------------------------===//
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// AMDGPU Target Machine (R600+)
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//===----------------------------------------------------------------------===//
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class AMDGPUTargetMachine : public LLVMTargetMachine {
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protected:
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TargetLoweringObjectFile *TLOF;
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AMDGPUSubtarget Subtarget;
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AMDGPUIntrinsicInfo IntrinsicInfo;
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public:
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AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
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StringRef CPU, TargetOptions Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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~AMDGPUTargetMachine();
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const AMDGPUSubtarget *getSubtargetImpl() const override {
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return &Subtarget;
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}
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const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
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return &IntrinsicInfo;
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}
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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/// \brief Register R600 analysis passes with a pass manager.
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void addAnalysisPasses(PassManagerBase &PM) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF;
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}
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};
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//===----------------------------------------------------------------------===//
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// GCN Target Machine (SI+)
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//===----------------------------------------------------------------------===//
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class GCNTargetMachine : public AMDGPUTargetMachine {
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public:
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GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
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StringRef CPU, TargetOptions Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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};
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} // End namespace llvm
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#endif
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