Bradley Smith de5be4657f [ARM] Add more pattern matching for f16 <-> f64 conversions ... Specifically when the conversion is done in two steps, f16 -> f32 -> f64. For example: %1 = tail call float @llvm.convert.from.fp16.f32(i16 %0) %conv = fpext float %1 to double to: vcvtb.f64.f16 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232954 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-23 15:59:54 +00:00
..
AArch64	AArch64: simplify test case	2015-03-21 04:37:08 +00:00
ARM	[ARM] Add more pattern matching for f16 <-> f64 conversions	2015-03-23 15:59:54 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips	Fix sign extension for MIPS64 in makeLibCall function	2015-03-23 12:28:13 +00:00
MSP430
NVPTX
PowerPC	[SDAG] Don't widen VSETCC during type legalization for split operands	2015-03-23 08:22:43 +00:00
R600	R600: Cleanup test with multiple check prefixes	2015-03-21 19:15:46 +00:00
SPARC
SystemZ
Thumb	[ARM] Fix handling of thumb1 out-of-range frame offsets	2015-03-20 17:20:07 +00:00
Thumb2
WinEH	Fixing a bug with WinEH PHI handling	2015-03-20 21:42:54 +00:00
X86	Tidied up vec_zero_cse.ll test. NFCI.	2015-03-21 14:05:12 +00:00
XCore