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ad6aedc7d9
This class is used by LSR and a number of places in the codegen. This is the first step in de-coupling LSR from TLI, and creating a new interface in between them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165455 91177308-0d34-0410-b5e6-96231b3b80d8
110 lines
3.9 KiB
C++
110 lines
3.9 KiB
C++
//===- AddrModeMatcher.h - Addressing mode matching facility ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// AddressingModeMatcher - This class exposes a single public method, which is
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// used to construct a "maximal munch" of the addressing mode for the target
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// specified by TLI for an access to "V" with an access type of AccessTy. This
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// returns the addressing mode that is actually matched by value, but also
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// returns the list of instructions involved in that addressing computation in
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// AddrModeInsts.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_UTILS_ADDRMODEMATCHER_H
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#define LLVM_TRANSFORMS_UTILS_ADDRMODEMATCHER_H
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#include "llvm/AddressingMode.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Target/TargetLowering.h"
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namespace llvm {
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class GlobalValue;
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class Instruction;
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class Value;
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class Type;
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class User;
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class raw_ostream;
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/// ExtAddrMode - This is an extended version of TargetLowering::AddrMode
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/// which holds actual Value*'s for register values.
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struct ExtAddrMode : public AddrMode {
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Value *BaseReg;
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Value *ScaledReg;
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ExtAddrMode() : BaseReg(0), ScaledReg(0) {}
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void print(raw_ostream &OS) const;
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void dump() const;
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bool operator==(const ExtAddrMode& O) const {
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return (BaseReg == O.BaseReg) && (ScaledReg == O.ScaledReg) &&
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(BaseGV == O.BaseGV) && (BaseOffs == O.BaseOffs) &&
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(HasBaseReg == O.HasBaseReg) && (Scale == O.Scale);
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}
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};
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static inline raw_ostream &operator<<(raw_ostream &OS, const ExtAddrMode &AM) {
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AM.print(OS);
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return OS;
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}
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class AddressingModeMatcher {
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SmallVectorImpl<Instruction*> &AddrModeInsts;
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const TargetLowering &TLI;
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/// AccessTy/MemoryInst - This is the type for the access (e.g. double) and
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/// the memory instruction that we're computing this address for.
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Type *AccessTy;
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Instruction *MemoryInst;
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/// AddrMode - This is the addressing mode that we're building up. This is
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/// part of the return value of this addressing mode matching stuff.
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ExtAddrMode &AddrMode;
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/// IgnoreProfitability - This is set to true when we should not do
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/// profitability checks. When true, IsProfitableToFoldIntoAddressingMode
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/// always returns true.
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bool IgnoreProfitability;
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AddressingModeMatcher(SmallVectorImpl<Instruction*> &AMI,
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const TargetLowering &T, Type *AT,
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Instruction *MI, ExtAddrMode &AM)
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: AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM) {
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IgnoreProfitability = false;
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}
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public:
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/// Match - Find the maximal addressing mode that a load/store of V can fold,
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/// give an access type of AccessTy. This returns a list of involved
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/// instructions in AddrModeInsts.
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static ExtAddrMode Match(Value *V, Type *AccessTy,
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Instruction *MemoryInst,
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SmallVectorImpl<Instruction*> &AddrModeInsts,
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const TargetLowering &TLI) {
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ExtAddrMode Result;
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bool Success =
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AddressingModeMatcher(AddrModeInsts, TLI, AccessTy,
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MemoryInst, Result).MatchAddr(V, 0);
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(void)Success; assert(Success && "Couldn't select *anything*?");
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return Result;
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}
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private:
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bool MatchScaledValue(Value *ScaleReg, int64_t Scale, unsigned Depth);
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bool MatchAddr(Value *V, unsigned Depth);
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bool MatchOperationAddr(User *Operation, unsigned Opcode, unsigned Depth);
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bool IsProfitableToFoldIntoAddressingMode(Instruction *I,
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ExtAddrMode &AMBefore,
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ExtAddrMode &AMAfter);
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bool ValueAlreadyLiveAtInst(Value *Val, Value *KnownLive1, Value *KnownLive2);
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};
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} // End llvm namespace
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#endif
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