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8eaed0f63d
This matches the format produced by the AMD proprietary driver. //==================================================================// // Shell script for converting .ll test cases: (Pass the .ll files you want to convert to this script as arguments). //==================================================================// ; This was necessary on my system so that A-Z in sed would match only ; upper case. I'm not sure why. export LC_ALL='C' TEST_FILES="$*" MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r` for f in $TEST_FILES; do # Check that there are SI tests: grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f if [ $? -eq 0 ]; then for match in $MATCHES; do sed -i -e "s/\([ :]$match\)/\L\1/" $f done # Try to get check lines with partial instruction names sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f fi done sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll //==================================================================// // Shell script for converting .td files (run this last) //==================================================================// export LC_ALL='C' sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
124 lines
4.6 KiB
LLVM
124 lines
4.6 KiB
LLVM
; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}anyext_load_i8:
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; EG: AND_INT
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; EG: 255
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define void @anyext_load_i8(i8 addrspace(1)* nocapture noalias %out, i8 addrspace(1)* nocapture noalias %src) nounwind {
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%cast = bitcast i8 addrspace(1)* %src to i32 addrspace(1)*
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%load = load i32 addrspace(1)* %cast, align 1
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%x = bitcast i32 %load to <4 x i8>
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%castOut = bitcast i8 addrspace(1)* %out to <4 x i8> addrspace(1)*
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store <4 x i8> %x, <4 x i8> addrspace(1)* %castOut, align 1
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ret void
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}
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; FUNC-LABEL: {{^}}anyext_load_i16:
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; EG: AND_INT
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; EG: AND_INT
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; EG-DAG: 65535
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; EG-DAG: -65536
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define void @anyext_load_i16(i16 addrspace(1)* nocapture noalias %out, i16 addrspace(1)* nocapture noalias %src) nounwind {
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%cast = bitcast i16 addrspace(1)* %src to i32 addrspace(1)*
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%load = load i32 addrspace(1)* %cast, align 1
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%x = bitcast i32 %load to <2 x i16>
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%castOut = bitcast i16 addrspace(1)* %out to <2 x i16> addrspace(1)*
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store <2 x i16> %x, <2 x i16> addrspace(1)* %castOut, align 1
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ret void
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}
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; FUNC-LABEL: {{^}}anyext_load_lds_i8:
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; EG: AND_INT
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; EG: 255
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define void @anyext_load_lds_i8(i8 addrspace(3)* nocapture noalias %out, i8 addrspace(3)* nocapture noalias %src) nounwind {
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%cast = bitcast i8 addrspace(3)* %src to i32 addrspace(3)*
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%load = load i32 addrspace(3)* %cast, align 1
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%x = bitcast i32 %load to <4 x i8>
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%castOut = bitcast i8 addrspace(3)* %out to <4 x i8> addrspace(3)*
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store <4 x i8> %x, <4 x i8> addrspace(3)* %castOut, align 1
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ret void
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}
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; FUNC-LABEL: {{^}}anyext_load_lds_i16:
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; EG: AND_INT
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; EG: AND_INT
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; EG-DAG: 65535
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; EG-DAG: -65536
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define void @anyext_load_lds_i16(i16 addrspace(3)* nocapture noalias %out, i16 addrspace(3)* nocapture noalias %src) nounwind {
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%cast = bitcast i16 addrspace(3)* %src to i32 addrspace(3)*
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%load = load i32 addrspace(3)* %cast, align 1
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%x = bitcast i32 %load to <2 x i16>
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%castOut = bitcast i16 addrspace(3)* %out to <2 x i16> addrspace(3)*
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store <2 x i16> %x, <2 x i16> addrspace(3)* %castOut, align 1
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ret void
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}
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; FUNC-LABEL: {{^}}sextload_global_i8_to_i64:
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; SI: buffer_load_sbyte [[LOAD:v[0-9]+]],
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; SI: v_ashrrev_i32_e32 v{{[0-9]+}}, 31, [[LOAD]]
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; SI: buffer_store_dwordx2
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define void @sextload_global_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(1)* %in) nounwind {
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%a = load i8 addrspace(1)* %in, align 8
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%ext = sext i8 %a to i64
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store i64 %ext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}sextload_global_i16_to_i64:
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; SI: buffer_load_sshort [[LOAD:v[0-9]+]],
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; SI: v_ashrrev_i32_e32 v{{[0-9]+}}, 31, [[LOAD]]
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; SI: buffer_store_dwordx2
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define void @sextload_global_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in) nounwind {
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%a = load i16 addrspace(1)* %in, align 8
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%ext = sext i16 %a to i64
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store i64 %ext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}sextload_global_i32_to_i64:
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; SI: buffer_load_dword [[LOAD:v[0-9]+]],
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; SI: v_ashrrev_i32_e32 v{{[0-9]+}}, 31, [[LOAD]]
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; SI: buffer_store_dwordx2
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define void @sextload_global_i32_to_i64(i64 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
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%a = load i32 addrspace(1)* %in, align 8
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%ext = sext i32 %a to i64
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store i64 %ext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_global_i8_to_i64:
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; SI-DAG: s_mov_b32 [[ZERO:s[0-9]+]], 0{{$}}
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; SI-DAG: buffer_load_ubyte [[LOAD:v[0-9]+]],
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; SI: v_mov_b32_e32 {{v[0-9]+}}, [[ZERO]]
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; SI: buffer_store_dwordx2
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define void @zextload_global_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(1)* %in) nounwind {
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%a = load i8 addrspace(1)* %in, align 8
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%ext = zext i8 %a to i64
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store i64 %ext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_global_i16_to_i64:
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; SI-DAG: s_mov_b32 [[ZERO:s[0-9]+]], 0{{$}}
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; SI-DAG: buffer_load_ushort [[LOAD:v[0-9]+]],
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; SI: v_mov_b32_e32 {{v[0-9]+}}, [[ZERO]]
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; SI: buffer_store_dwordx2
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define void @zextload_global_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in) nounwind {
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%a = load i16 addrspace(1)* %in, align 8
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%ext = zext i16 %a to i64
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store i64 %ext, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}zextload_global_i32_to_i64:
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; SI-DAG: s_mov_b32 [[ZERO:s[0-9]+]], 0{{$}}
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; SI-DAG: buffer_load_dword [[LOAD:v[0-9]+]],
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; SI: v_mov_b32_e32 {{v[0-9]+}}, [[ZERO]]
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; SI: buffer_store_dwordx2
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define void @zextload_global_i32_to_i64(i64 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
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%a = load i32 addrspace(1)* %in, align 8
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%ext = zext i32 %a to i64
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store i64 %ext, i64 addrspace(1)* %out, align 8
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ret void
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}
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