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https://github.com/c64scene-ar/llvm-6502.git
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d950941e13
Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
874 B
LLVM
52 lines
874 B
LLVM
; RUN: llvm-as < %s | llc -march=bfin
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define i8 @add(i8 %A, i8 %B) {
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%R = add i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @sub(i8 %A, i8 %B) {
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%R = sub i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @mul(i8 %A, i8 %B) {
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%R = mul i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @sdiv(i8 %A, i8 %B) {
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%R = sdiv i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @udiv(i8 %A, i8 %B) {
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%R = udiv i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @srem(i8 %A, i8 %B) {
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%R = srem i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @urem(i8 %A, i8 %B) {
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%R = urem i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @and(i8 %A, i8 %B) {
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%R = and i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @or(i8 %A, i8 %B) {
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%R = or i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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define i8 @xor(i8 %A, i8 %B) {
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%R = xor i8 %A, %B ; <i8> [#uses=1]
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ret i8 %R
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}
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