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d950941e13
Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
14 lines
437 B
LLVM
14 lines
437 B
LLVM
; RUN: llvm-as < %s | llc -march=bfin -verify-machineinstrs
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; This somewhat contrived function heavily exercises register classes
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; It can trick -join-cross-class-copies into making illegal joins
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define void @f(i16** nocapture %p) nounwind readonly {
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entry:
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%tmp1 = load i16** %p ; <i16*> [#uses=1]
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%tmp2 = load i16* %tmp1 ; <i16> [#uses=1]
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%ptr = getelementptr i16* %tmp1, i16 %tmp2
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store i16 %tmp2, i16* %ptr
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ret void
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}
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