llvm-6502/test/MC/Disassembler/AArch64
Tim Northover f61a467a59 TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:16:32 +00:00
..
a64-ignored-fields.txt
basic-a64-instructions.txt TableGen: use PrintMethods to print more aliases 2014-05-12 18:04:06 +00:00
basic-a64-undefined.txt AArch64/ARM64: rewrite test to use FileCheck & add ARM64 lines 2014-05-01 12:30:01 +00:00
basic-a64-unpredictable.txt AArch64/ARM64: implement diagnosis of unpredictable loads & stores 2014-05-06 14:15:14 +00:00
gicv3-regs.txt
ldp-offset-predictable.txt
ldp-postind.predictable.txt
ldp-preind.predictable.txt
lit.local.cfg AArch64/ARM64: disable test directory if ARM64 not present 2014-05-07 10:42:06 +00:00
neon-instructions.txt TableGen/ARM64: print aliases even if they have syntax variants. 2014-05-15 11:16:32 +00:00
trace-regs.txt