mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
9236362a64
This patch will generate the following for integer ABS:
movl %edi, %eax
negl %eax
cmovll %edi, %eax
INSTEAD OF
movl %edi, %ecx
sarl $31, %ecx
leal (%rdi,%rcx), %eax
xorl %ecx, %eax
There exists a target-independent DAG combine for integer ABS, which converts
integer ABS to sar+add+xor. For X86, we match this pattern back to neg+cmov.
This is implemented in PerformXorCombine.
rdar://10695237
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158175 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
484 B
LLVM
21 lines
484 B
LLVM
; RUN: llc < %s -march=x86-64 | FileCheck %s
|
|
|
|
;; Integer absolute value, should produce something at least as good as:
|
|
;; movl %edi, %eax
|
|
;; negl %eax
|
|
;; cmovll %edi, %eax
|
|
;; ret
|
|
; rdar://10695237
|
|
define i32 @test(i32 %a) nounwind {
|
|
; CHECK: test:
|
|
; CHECK: mov
|
|
; CHECK-NEXT: neg
|
|
; CHECK-NEXT: cmov
|
|
; CHECK-NEXT: ret
|
|
%tmp1neg = sub i32 0, %a
|
|
%b = icmp sgt i32 %a, -1
|
|
%abs = select i1 %b, i32 %a, i32 %tmp1neg
|
|
ret i32 %abs
|
|
}
|
|
|