llvm-6502/lib/Target/SystemZ/SystemZProcessors.td
Richard Sandiford d954716e75 [SystemZ] Add FI[EDX]BRA
These are extensions of the existing FI[EDX]BR instructions, but use a spare
bit to suppress inexact conditions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 08:58:08 +00:00

46 lines
1.6 KiB
TableGen

//===-- SystemZ.td - SystemZ processors and features ---------*- tblgen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Processor and feature definitions.
//
//===----------------------------------------------------------------------===//
class SystemZFeature<string extname, string intname, string desc>
: Predicate<"Subtarget.has"##intname##"()">,
AssemblerPredicate<"Feature"##intname, extname>,
SubtargetFeature<extname, "Has"##intname, "true", desc>;
def FeatureDistinctOps : SystemZFeature<
"distinct-ops", "DistinctOps",
"Assume that the distinct-operands facility is installed"
>;
def FeatureLoadStoreOnCond : SystemZFeature<
"load-store-on-cond", "LoadStoreOnCond",
"Assume that the load/store-on-condition facility is installed"
>;
def FeatureHighWord : SystemZFeature<
"high-word", "HighWord",
"Assume that the high-word facility is installed"
>;
def FeatureFPExtension : SystemZFeature<
"fp-extension", "FPExtension",
"Assume that the floating-point extension facility is installed"
>;
def : Processor<"z10", NoItineraries, []>;
def : Processor<"z196", NoItineraries,
[FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
FeatureFPExtension]>;
def : Processor<"zEC12", NoItineraries,
[FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
FeatureFPExtension]>;