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dffb051c21
Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
486 B
LLVM
21 lines
486 B
LLVM
; RUN: llvm-as < %s | llc -mtriple=armv7-eabi -mattr=+vfp2
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; PR4686
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@g_d = external global double ; <double*> [#uses=1]
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define arm_aapcscc void @foo(float %yIncr) {
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entry:
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br i1 undef, label %bb, label %bb4
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bb: ; preds = %entry
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%0 = call arm_aapcs_vfpcc float @bar() ; <float> [#uses=1]
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%1 = fpext float %0 to double ; <double> [#uses=1]
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store double %1, double* @g_d, align 8
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br label %bb4
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bb4: ; preds = %bb, %entry
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unreachable
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}
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declare arm_aapcs_vfpcc float @bar()
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