llvm-6502/test/CodeGen
James Molloy e0243fb42d [AArch64] Add a testcase for r214957.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214965 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-06 13:31:32 +00:00
..
AArch64 [AArch64] Add a testcase for r214957. 2014-08-06 13:31:32 +00:00
ARM ARM: do not generate BLX instructions on Cortex-M CPUs. 2014-08-06 11:13:14 +00:00
CPP
Generic
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips
MSP430
NVPTX
PowerPC [PowerPC] Swap arguments and adjust shift count for vsldoi on little endian 2014-08-05 20:47:25 +00:00
R600 R600: Increase nearby load scheduling threshold. 2014-08-06 00:29:49 +00:00
SPARC
SystemZ
Thumb
Thumb2 ARM: do not generate BLX instructions on Cortex-M CPUs. 2014-08-06 11:13:14 +00:00
X86 [x86] Fix two independent miscompiles in the process of getting the same 2014-08-06 10:16:36 +00:00
XCore