llvm-6502/test/CodeGen
Eli Friedman 3a594f4876 FileCheck-ize a couple tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 21:23:42 +00:00
..
Alpha
ARM Fix a crash when building 177.mesa for armv6. 2011-07-18 18:47:13 +00:00
Blackfin more tests not making the jump into the brave new world. 2011-07-09 16:57:10 +00:00
CBackend more tests not making the jump into the brave new world. 2011-07-09 16:57:10 +00:00
CellSPU
CPP
Generic Comment correction. 2011-07-12 03:39:22 +00:00
MBlaze
Mips Do not treat atomic.load.sub differently than other atomic binary intrinsics. 2011-07-18 19:58:59 +00:00
MSP430
PowerPC FileCheck-ize a couple tests. 2011-07-18 21:23:42 +00:00
PTX
SPARC
SystemZ
Thumb Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
Thumb2 Improve codegen for select's: 2011-07-13 00:42:17 +00:00
X86 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 2011-07-18 20:55:23 +00:00
XCore