llvm-6502/test/MC/Disassembler/ARM/invalid-MSRi-arm.txt
2011-08-11 20:21:46 +00:00

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# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
# Opcode=206 Name=MSRi Format=ARM_FORMAT_BRFRM(2)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 1: 0| 0: 0: 0: 0| 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 0| 0: 1: 1: 1|
# -------------------------------------------------------------------------------------------------
#
# A5.2.11 MSR (immediate), and hints & B6.1.6 MSR (immediate)
# The hints instructions have more specific encodings, so if mask == 0,
# we should reject this as an invalid instruction.
0xa7 0xf1 0x20 0x3