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This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
102 lines
2.2 KiB
LLVM
102 lines
2.2 KiB
LLVM
; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - \
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; RUN: | FileCheck %s -check-prefix=VFP2
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; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - \
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; RUN: | FileCheck %s -check-prefix=NEON
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
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; RUN: | FileCheck %s -check-prefix=A8
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic %s -o - \
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; RUN: | FileCheck %s -check-prefix=A8
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
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; RUN: | FileCheck %s -check-prefix=A8U
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; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
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; RUN: | FileCheck %s -check-prefix=A8U
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define float @t1(float %acc, float %a, float %b) nounwind {
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entry:
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; VFP2-LABEL: t1:
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; VFP2: vnmla.f32
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; NEON-LABEL: t1:
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; NEON: vnmla.f32
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; A8U-LABEL: t1:
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; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
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; A8-LABEL: t1:
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; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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%0 = fmul float %a, %b
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%1 = fsub float -0.0, %0
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%2 = fsub float %1, %acc
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ret float %2
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}
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define float @t2(float %acc, float %a, float %b) nounwind {
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entry:
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; VFP2-LABEL: t2:
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; VFP2: vnmla.f32
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; NEON-LABEL: t2:
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; NEON: vnmla.f32
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; A8U-LABEL: t2:
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; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
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; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
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; A8-LABEL: t2:
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; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
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; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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%0 = fmul float %a, %b
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%1 = fmul float -1.0, %0
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%2 = fsub float %1, %acc
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ret float %2
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}
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define double @t3(double %acc, double %a, double %b) nounwind {
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entry:
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; VFP2-LABEL: t3:
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; VFP2: vnmla.f64
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; NEON-LABEL: t3:
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; NEON: vnmla.f64
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; A8U-LABEL: t3:
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; A8U: vnmul.f64 d
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; A8U: vsub.f64 d
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; A8-LABEL: t3:
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; A8: vnmul.f64 d
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; A8: vsub.f64 d
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%0 = fmul double %a, %b
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%1 = fsub double -0.0, %0
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%2 = fsub double %1, %acc
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ret double %2
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}
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define double @t4(double %acc, double %a, double %b) nounwind {
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entry:
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; VFP2-LABEL: t4:
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; VFP2: vnmla.f64
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; NEON-LABEL: t4:
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; NEON: vnmla.f64
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; A8U-LABEL: t4:
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; A8U: vnmul.f64 d
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; A8U: vsub.f64 d
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; A8-LABEL: t4:
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; A8: vnmul.f64 d
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; A8: vsub.f64 d
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%0 = fmul double %a, %b
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%1 = fmul double -1.0, %0
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%2 = fsub double %1, %acc
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ret double %2
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}
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