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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
30 lines
1.2 KiB
LLVM
30 lines
1.2 KiB
LLVM
; RUN: llc < %s -mcpu=swift -mtriple=armv7s-apple-ios | FileCheck %s
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; Check that we avoid producing vldm instructions using d registers that
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; begin in the most-significant half of a q register. These require more
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; micro-ops on swift and so aren't worth combining.
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; CHECK-LABEL: test_vldm
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; CHECK: vldmia r{{[0-9]+}}, {d2, d3, d4}
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; CHECK-NOT: vldmia r{{[0-9]+}}, {d1, d2, d3, d4}
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declare fastcc void @force_register(double %d0, double %d1, double %d2, double %d3, double %d4)
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define void @test_vldm(double* %x, double * %y) {
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entry:
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%addr1 = getelementptr double, double * %x, i32 1
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%addr2 = getelementptr double, double * %x, i32 2
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%addr3 = getelementptr double, double * %x, i32 3
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%d0 = load double , double * %y
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%d1 = load double , double * %x
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%d2 = load double , double * %addr1
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%d3 = load double , double * %addr2
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%d4 = load double , double * %addr3
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; We are trying to force x[0-3] in registers d1 to d4 so that we can test we
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; don't form a "vldmia rX, {d1, d2, d3, d4}".
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; We are relying on the calling convention and that register allocation
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; properly coalesces registers.
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call fastcc void @force_register(double %d0, double %d1, double %d2, double %d3, double %d4)
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ret void
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}
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