llvm-6502/test/CodeGen/Mips/bswap.ll
Simon Atanasyan c5e99819f4 [Mips] Adjust float ABI settings in case of MIPS16 mode.
Hard float for mips16 means essentially to compile as soft float but to
use a runtime library for soft float that is written with native mips32
floating point instructions (those runtime routines run in mips32 hard
float mode).

The patch reviewed by Reed Kotler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 12:20:17 +00:00

29 lines
860 B
LLVM

; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
; RUN: llc < %s -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 | FileCheck %s -check-prefix=mips16
define i32 @bswap32(i32 %x) nounwind readnone {
entry:
; MIPS32-LABEL: bswap32:
; MIPS32: wsbh $[[R0:[0-9]+]]
; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
; mips16: .ent bswap32
%or.3 = call i32 @llvm.bswap.i32(i32 %x)
ret i32 %or.3
}
define i64 @bswap64(i64 %x) nounwind readnone {
entry:
; MIPS64-LABEL: bswap64:
; MIPS64: dsbh $[[R0:[0-9]+]]
; MIPS64: dshd ${{[0-9]+}}, $[[R0]]
; mips16: .ent bswap64
%or.7 = call i64 @llvm.bswap.i64(i64 %x)
ret i64 %or.7
}
declare i32 @llvm.bswap.i32(i32) nounwind readnone
declare i64 @llvm.bswap.i64(i64) nounwind readnone