llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-08 04:07:07 +00:00

History

Jakob Stoklund Olesen f28987b76e Use set operations instead of plain lists to enumerate register classes. This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8		2011-06-15 23:28:14 +00:00
..
TargetInfo
CMakeLists.txt
Makefile
README.txt
XCore.h
XCore.td
XCoreAsmPrinter.cpp
XCoreCallingConv.td
XCoreFrameLowering.cpp
XCoreFrameLowering.h
XCoreInstrFormats.td
XCoreInstrInfo.cpp
XCoreInstrInfo.h
XCoreInstrInfo.td	Fix 80 column violations.	2011-05-31 16:30:33 +00:00
XCoreISelDAGToDAG.cpp	Add XCore intrinsic for crc8.	2011-05-31 16:24:49 +00:00
XCoreISelLowering.cpp	Add a parameter to CCState so that it can access the MachineFunction.	2011-06-08 23:55:35 +00:00
XCoreISelLowering.h	Add a parameter to CCState so that it can access the MachineFunction.	2011-06-08 23:55:35 +00:00
XCoreMachineFunctionInfo.h
XCoreMCAsmInfo.cpp
XCoreMCAsmInfo.h
XCoreRegisterInfo.cpp	Use the dwarf->llvm mapping to print register names in the cfi	2011-05-30 20:20:15 +00:00
XCoreRegisterInfo.h	Use the dwarf->llvm mapping to print register names in the cfi	2011-05-30 20:20:15 +00:00
XCoreRegisterInfo.td	Use set operations instead of plain lists to enumerate register classes.	2011-06-15 23:28:14 +00:00
XCoreSelectionDAGInfo.cpp
XCoreSelectionDAGInfo.h
XCoreSubtarget.cpp
XCoreSubtarget.h
XCoreTargetMachine.cpp
XCoreTargetMachine.h
XCoreTargetObjectFile.cpp
XCoreTargetObjectFile.h

README.txt

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins