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This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each basic block in a machine function. For each basic block the instructions are processed in reversed order and if a patchpoint or stackmap instruction is encountered the current live-out register set is encoded as a register mask and attached to the instruction. Later on during stackmap generation the live-out register mask is processed and also emitted as part of the stackmap. This information is optional and intended for optimization purposes only. This will enable a client of the stackmap to reason about the registers it can use and which registers need to be preserved. Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197317 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
CMakeLists.txt | ||
DAGCombiner.cpp | ||
FastISel.cpp | ||
FunctionLoweringInfo.cpp | ||
InstrEmitter.cpp | ||
InstrEmitter.h | ||
LegalizeDAG.cpp | ||
LegalizeFloatTypes.cpp | ||
LegalizeIntegerTypes.cpp | ||
LegalizeTypes.cpp | ||
LegalizeTypes.h | ||
LegalizeTypesGeneric.cpp | ||
LegalizeVectorOps.cpp | ||
LegalizeVectorTypes.cpp | ||
LLVMBuild.txt | ||
Makefile | ||
ResourcePriorityQueue.cpp | ||
ScheduleDAGFast.cpp | ||
ScheduleDAGRRList.cpp | ||
ScheduleDAGSDNodes.cpp | ||
ScheduleDAGSDNodes.h | ||
ScheduleDAGVLIW.cpp | ||
SDNodeDbgValue.h | ||
SelectionDAG.cpp | ||
SelectionDAGBuilder.cpp | ||
SelectionDAGBuilder.h | ||
SelectionDAGDumper.cpp | ||
SelectionDAGISel.cpp | ||
SelectionDAGPrinter.cpp | ||
TargetLowering.cpp | ||
TargetSelectionDAGInfo.cpp |