llvm-6502/lib/Target/IA64
Dan Gohman 8be6bbe5bf Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.

The impact on most targets is that AddToISelQueue calls can be simply removed.

In the x86 target, there are two additional notable changes.

The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.

Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
..
CMakeLists.txt
IA64.h
IA64.td
IA64AsmPrinter.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64Bundling.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64InstrBuilder.h
IA64InstrFormats.td
IA64InstrInfo.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64InstrInfo.h
IA64InstrInfo.td
IA64ISelDAGToDAG.cpp Eliminate the ISel priority queue, which used the topological order for a 2008-11-05 04:14:16 +00:00
IA64ISelLowering.cpp Rename LoadX to LoadExt. 2008-10-14 21:26:46 +00:00
IA64ISelLowering.h
IA64MachineFunctionInfo.h
IA64RegisterInfo.cpp Switch the MachineOperand accessors back to the short names like 2008-10-03 15:45:36 +00:00
IA64RegisterInfo.h
IA64RegisterInfo.td
IA64TargetAsmInfo.cpp
IA64TargetAsmInfo.h
IA64TargetMachine.cpp mark some targets as experimental. Andrew, if you think that Alpha is 2008-10-16 06:16:50 +00:00
IA64TargetMachine.h
Makefile
README

TODO:
  - Un-bitrot ISel
  - Hook up If-Conversion a la ARM target
  - Hook up all branch analysis functions
  - Instruction scheduling
  - Bundling
  - Dynamic Optimization
  - Testing and bugfixing
  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:
  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:
  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:
  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:
  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.