Dan Gohman 6ac33b4533 Don't try to replace physical registers when doing CSE. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97360 91177308-0d34-0410-b5e6-96231b3b80d8		2010-02-28 01:33:43 +00:00
..
Alpha	Delete useless trailing semicolons.	2010-01-05 17:55:26 +00:00
ARM	Check for comparisons of +/- zero when optimizing less-than-or-equal and	2010-02-24 22:15:53 +00:00
Blackfin	Change the scheduler from adding nodes in allnodes order	2010-02-24 06:11:37 +00:00
CBackend
CellSPU	don't let asm-verbose break the check-next lines in these tests.	2010-01-19 06:39:54 +00:00
CPP
Generic	Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there	2010-02-15 22:35:59 +00:00
MBlaze	Adding the MicroBlaze backend.	2010-02-23 19:15:24 +00:00
Mips	Delete useless trailing semicolons.	2010-01-05 17:55:26 +00:00
MSP430	Change the scheduler from adding nodes in allnodes order	2010-02-24 06:11:37 +00:00
PIC16	Reapply things reverted back in 97220, with the fixed test case.	2010-02-26 17:59:28 +00:00
PowerPC	Use the right floating point load/store instructions in PPCInstrInfo::foldMemoryOperandImpl().	2010-02-26 21:09:24 +00:00
SPARC	add support for the sparcv9-*-* target triple to turn on	2010-02-04 06:34:01 +00:00
SystemZ	Teach dag combine to fold the following transformation more aggressively:	2010-01-06 19:38:29 +00:00
Thumb	Run the pre-register allocation tail duplication pass by default. Remove	2010-01-16 00:29:50 +00:00
Thumb2	Create a stack frame on ARM when	2010-02-24 22:43:17 +00:00
X86	Don't try to replace physical registers when doing CSE.	2010-02-28 01:33:43 +00:00
XCore	Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy.	2010-02-26 16:44:51 +00:00