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f98f2ce29e
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.5 KiB
C++
41 lines
1.5 KiB
C++
//===--------------------- AMDILFrameLowering.h -----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Interface to describe a layout of a stack frame on a AMDIL target
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/// machine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef AMDILFRAME_LOWERING_H
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#define AMDILFRAME_LOWERING_H
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Target/TargetFrameLowering.h"
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namespace llvm {
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/// \brief Information about the stack frame layout on the AMDGPU targets.
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///
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/// It holds the direction of the stack growth, the known stack alignment on
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/// entry to each function, and the offset to the locals area.
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/// See TargetFrameInfo for more comments.
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class AMDGPUFrameLowering : public TargetFrameLowering {
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public:
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AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
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unsigned TransAl = 1);
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virtual ~AMDGPUFrameLowering();
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virtual int getFrameIndexOffset(const MachineFunction &MF, int FI) const;
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virtual const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries) const;
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virtual void emitPrologue(MachineFunction &MF) const;
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virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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virtual bool hasFP(const MachineFunction &MF) const;
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};
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} // namespace llvm
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#endif // AMDILFRAME_LOWERING_H
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