llvm-6502/test/CodeGen/ARM64/inline-asm-error-L.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

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369 B
LLVM

; RUN: not llc -march=arm64 < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
; Check for at least one invalid constant.
; CHECK-ERRORS: error: invalid operand for inline asm constraint 'L'
define i32 @constraint_L(i32 %i, i32 %j) nounwind {
entry:
%0 = tail call i32 asm sideeffect "eor $0, $1, $2", "=r,r,L"(i32 %i, i64 -1) nounwind
ret i32 %0
}