llvm-6502/test/CodeGen/ARM64/register-offset-addressing.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

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311 B
LLVM

; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
define i8 @t1(i16* %a, i64 %b) {
; CHECK: t1
; CHECK: lsl [[REG:x[0-9]+]], x1, #1
; CHECK: ldrb w0, [x0, [[REG]]]
; CHECK: ret
%tmp1 = getelementptr inbounds i16* %a, i64 %b
%tmp2 = load i16* %tmp1
%tmp3 = trunc i16 %tmp2 to i8
ret i8 %tmp3
}