6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-30 04:56:49 +00:00
Code Issues Projects Releases Wiki Activity
e16fa7fec8
llvm-6502/test/MC
History
Toma Tabacu d174678830 [mips] [IAS] Add support for LASym with identical source and destination register operands. 
Summary:
In this case, we're supposed to load the address of the symbol in AT and then ADDu it with the source register and
put it in the destination register.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240273 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 12:08:39 +00:00
..
AArch64 Improve the --expand-relocs handling of MachO. 2015-06-18 22:38:20 +00:00
AMDGPU R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
ARM Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
AsmParser
COFF
Disassembler
ELF Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
Hexagon
MachO Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
Markup
Mips [mips] [IAS] Add support for LASym with identical source and destination register operands. 2015-06-22 12:08:39 +00:00
PowerPC Properly handle the mftb instruction. 2015-06-16 16:01:15 +00:00
Sparc Revert 240130, it caused crashes (repro in PR23900). 2015-06-19 23:43:47 +00:00
SystemZ
X86 AVX-512: All forms of VCOPMRESS VEXPAND instructions, 2015-06-22 11:16:30 +00:00