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veqv (vector equivalence) vnand vorc I increased the AddedComplexity for these instructions to 500 to ensure they are generated instead of issuing other VSX instructions. Phabricator review: http://reviews.llvm.org/D7469 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228580 91177308-0d34-0410-b5e6-96231b3b80d8 |
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AArch64 | ||
ARM | ||
AsmParser | ||
COFF | ||
Disassembler | ||
ELF | ||
Hexagon | ||
MachO | ||
Markup | ||
Mips | ||
PowerPC | ||
R600 | ||
Sparc | ||
SystemZ | ||
X86 |