llvm-6502/test/CodeGen
Jakob Stoklund Olesen e17232ee4d Dont emit 'DBG_VALUE %noreg, ...' to terminate user variable ranges.
These ranges get completely jumbled by the post-ra scheduler, and it is not
really reasonable to expect it to make sense of them.

Instead, teach DwarfDebug to notice when user variables in registers are
clobbered, and terminate the ranges there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128045 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 00:21:41 +00:00
..
Alpha
ARM Write the section table and the section data in the same order that 2011-03-20 18:44:20 +00:00
Blackfin Be nice to Xcore and the XMOS assembler and avoid quoting section names 2011-03-04 20:03:14 +00:00
CBackend
CellSPU Roll r127459 back in: 2011-03-11 21:52:04 +00:00
CPP
Generic Make this test x86 specific because the ARM backend can't handle it. 2011-02-28 12:30:47 +00:00
MBlaze
Mips Revert "Re-enable test and hope to silence the buildbots", still broken. 2011-03-09 22:48:46 +00:00
MSP430
PowerPC Fix mistyped CHECK lines. 2011-03-09 22:07:31 +00:00
PTX PTX: Fix various codegen issues 2011-03-18 19:24:28 +00:00
SPARC
SystemZ
Thumb Roll r127459 back in: 2011-03-11 21:52:04 +00:00
Thumb2 Roll r127459 back in: 2011-03-11 21:52:04 +00:00
X86 Dont emit 'DBG_VALUE %noreg, ...' to terminate user variable ranges. 2011-03-22 00:21:41 +00:00
XCore Add XCore intrinsic for setpsc. 2011-03-17 18:42:05 +00:00