Craig Topper e1b4a1a07e Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140954 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-01 19:54:56 +00:00
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dg.exp
enhanced.txt	Fixed a bug in the enhanced disassembler that caused	2011-02-23 03:31:28 +00:00
intel-syntax.txt	Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700.	2011-09-23 06:57:25 +00:00
invalid-VEX-vvvv.txt	Add test case for PR10851.	2011-09-14 04:36:54 +00:00
simple-tests.txt	Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702.	2011-10-01 19:54:56 +00:00
truncated-input.txt
x86-32.txt	Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702.	2011-10-01 19:54:56 +00:00