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5d6365c80c
This is mostly achieved by providing the correct register class manually, because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and MVT::i64. Also cleanup the code to use the FastEmitInst_* method whenever possible. This makes sure that the operands' register class is properly constrained. For all the remaining cases this adds the missing constrainOperandRegClass calls for each operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216225 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
1.5 KiB
LLVM
48 lines
1.5 KiB
LLVM
; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
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@sortlist = common global [5001 x i32] zeroinitializer, align 16
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@sortlist2 = common global [5001 x i64] zeroinitializer, align 16
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; Load an address with an offset larget then LDR imm can handle
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define i32 @foo() nounwind {
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entry:
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; CHECK: @foo
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; CHECK: adrp x[[REG:[0-9]+]], _sortlist@GOTPAGE
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; CHECK: ldr x[[REG1:[0-9]+]], [x[[REG]], _sortlist@GOTPAGEOFF]
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; CHECK: movz x[[REG2:[0-9]+]], #0x4e20
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; CHECK: add x[[REG3:[0-9]+]], x[[REG1]], x[[REG2]]
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; CHECK: ldr w0, [x[[REG3]]]
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; CHECK: ret
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%0 = load i32* getelementptr inbounds ([5001 x i32]* @sortlist, i32 0, i64 5000), align 4
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ret i32 %0
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}
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define i64 @foo2() nounwind {
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entry:
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; CHECK: @foo2
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; CHECK: adrp x[[REG:[0-9]+]], _sortlist2@GOTPAGE
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; CHECK: ldr x[[REG1:[0-9]+]], [x[[REG]], _sortlist2@GOTPAGEOFF]
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; CHECK: movz x[[REG2:[0-9]+]], #0x9c40
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; CHECK: add x[[REG3:[0-9]+]], x[[REG1]], x[[REG2]]
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; CHECK: ldr x0, [x[[REG3]]]
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; CHECK: ret
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%0 = load i64* getelementptr inbounds ([5001 x i64]* @sortlist2, i32 0, i64 5000), align 4
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ret i64 %0
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}
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; Load an address with a ridiculously large offset.
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; rdar://12505553
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@pd2 = common global i8* null, align 8
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define signext i8 @foo3() nounwind ssp {
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entry:
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; CHECK: @foo3
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; CHECK: movz x[[REG:[0-9]+]], #0xb3a, lsl #32
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; CHECK: movk x[[REG]], #0x73ce, lsl #16
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; CHECK: movk x[[REG]], #0x2ff2
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%0 = load i8** @pd2, align 8
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%arrayidx = getelementptr inbounds i8* %0, i64 12345678901234
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%1 = load i8* %arrayidx, align 1
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ret i8 %1
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}
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