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2045c47aff
- Support mips1 like load/store of doubles: Instead of: sdc $f0, X($3) Generate: swc $f0, X($3) swc $f1, X+4($3) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89322 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
2.8 KiB
C++
89 lines
2.8 KiB
C++
//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPSREGISTERINFO_H
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#define MIPSREGISTERINFO_H
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#include "Mips.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "MipsGenRegisterInfo.h.inc"
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namespace llvm {
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class MipsSubtarget;
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class TargetInstrInfo;
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class Type;
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namespace Mips {
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/// SubregIndex - The index of various sized subregister classes. Note that
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/// these indices must be kept in sync with the class indices in the
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/// MipsRegisterInfo.td file.
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enum SubregIndex {
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SUBREG_FPEVEN = 1, SUBREG_FPODD = 2
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};
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}
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struct MipsRegisterInfo : public MipsGenRegisterInfo {
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const MipsSubtarget &Subtarget;
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const TargetInstrInfo &TII;
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MipsRegisterInfo(const MipsSubtarget &Subtarget, const TargetInstrInfo &tii);
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/// getRegisterNumbering - Given the enum value for some register, e.g.
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/// Mips::RA, return the number that it corresponds to (e.g. 31).
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static unsigned getRegisterNumbering(unsigned RegEnum);
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/// Get PIC indirect call register
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static unsigned getPICCallReg();
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/// Adjust the Mips stack frame.
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void adjustMipsStackFrame(MachineFunction &MF) const;
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/// Code Generation virtual methods...
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const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
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const TargetRegisterClass* const*
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getCalleeSavedRegClasses(const MachineFunction* MF = 0) const;
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BitVector getReservedRegs(const MachineFunction &MF) const;
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bool hasFP(const MachineFunction &MF) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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/// Stack Frame Processing Methods
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unsigned eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, int *Value = NULL,
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RegScavenger *RS = NULL) const;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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void emitPrologue(MachineFunction &MF) const;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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/// Debug information queries.
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unsigned getRARegister() const;
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unsigned getFrameRegister(const MachineFunction &MF) const;
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/// Exception handling queries.
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unsigned getEHExceptionRegister() const;
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unsigned getEHHandlerRegister() const;
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int getDwarfRegNum(unsigned RegNum, bool isEH) const;
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};
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} // end namespace llvm
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#endif
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