llvm-6502/test/CodeGen
Andrew Trick e1f663933a Broaden isSchedulingBoundary to check aliases of SP.
On PPC the stack pointer is X1, but ADJCALLSTACK writes R1.

Fixes PR14315: Register regmask dependency problem with misched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 03:35:11 +00:00
..
ARM Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete Couperus. 2012-11-17 01:52:46 +00:00
CPP
Generic Codegen support for arbitrary vector getelementptrs. 2012-11-13 13:01:58 +00:00
Hexagon test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts. 2012-11-14 22:22:37 +00:00
MBlaze
Mips Initial implementation of MipsTargetLowering::isLegalAddressingMode. 2012-11-17 00:25:41 +00:00
MSP430 Fix fallout from RegInfo => FrameLowering refactoring on MSP430. 2012-10-17 17:37:11 +00:00
NVPTX [NVPTX] Order global variables in def-use order before emiting them in the final assembly 2012-11-16 21:03:51 +00:00
PowerPC Broaden isSchedulingBoundary to check aliases of SP. 2012-11-17 03:35:11 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Convert an improper CodeGen test to a MC test. 2012-11-10 04:30:40 +00:00
Thumb2 Add GPRPair Register class to ARM. 2012-10-26 21:29:15 +00:00
X86 llvm/test/CodeGen/X86/hipe-cc*.ll: Add explicit -mcpu, or they don't expect to pass on Atom. 2012-11-16 16:07:37 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00