llvm-6502/test/MC/Mips/mips5
Matheus Almeida 95f1fa7ec3 [mips] SYNC $stype instruction was added in Mips32
but SYNC with an implied operand ($stype = 0) is valid since Mips2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211185 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-18 17:10:30 +00:00
..
invalid-mips32.s [mips] SYNC $stype instruction was added in Mips32 2014-06-18 17:10:30 +00:00
invalid-mips64.s [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 2014-06-11 15:05:56 +00:00
invalid-mips64r2-xfail.s [mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2 2014-05-14 15:35:03 +00:00
invalid-mips64r2.s [mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2 2014-05-14 15:35:03 +00:00
valid-xfail.s [mips] Correct tests that are meant to test valid assembly. They were actually rejected by GAS. 2014-05-08 15:17:29 +00:00
valid.s [mips] SYNC $stype instruction was added in Mips32 2014-06-18 17:10:30 +00:00