mirror of
https://github.com/c64scene-ar/llvm-6502.git
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e2d6f91d63
For some reason I never got around to adding these at the same time as the signed versions. No idea why. I'm not sure whether this SystemZII::BranchC* stuff is useful, or whether it should just be replaced with an "is normal" flag. I'll leave that for later though. There are some boundary conditions that can be tweaked, such as preferring unsigned comparisons for equality with [128, 256), and "<= 255" over "< 256", but again I'll leave those for a separate patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190930 91177308-0d34-0410-b5e6-96231b3b80d8
122 lines
2.6 KiB
LLVM
122 lines
2.6 KiB
LLVM
; Test 64-bit comparisons in which the second operand is zero-extended
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; from a PC-relative i16.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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@g = global i16 1
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@h = global i16 1, align 1, section "foo"
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; Check unsigned comparison.
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define i64 @f1(i64 %src1) {
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; CHECK-LABEL: f1:
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; CHECK: clghrl %r2, g
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; CHECK-NEXT: jl
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; CHECK: br %r14
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entry:
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%val = load i16 *@g
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%src2 = zext i16 %val to i64
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%cond = icmp ult i64 %src1, %src2
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br i1 %cond, label %exit, label %mulb
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mulb:
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%mul = mul i64 %src1, %src1
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br label %exit
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exit:
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%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
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ret i64 %res
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}
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; Check signed comparison.
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define i64 @f2(i64 %src1) {
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; CHECK-LABEL: f2:
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; CHECK-NOT: clghrl
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; CHECK: br %r14
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entry:
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%val = load i16 *@g
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%src2 = zext i16 %val to i64
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%cond = icmp slt i64 %src1, %src2
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br i1 %cond, label %exit, label %mulb
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mulb:
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%mul = mul i64 %src1, %src1
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br label %exit
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exit:
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%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
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ret i64 %res
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}
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; Check equality.
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define i64 @f3(i64 %src1) {
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; CHECK-LABEL: f3:
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; CHECK: clghrl %r2, g
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; CHECK-NEXT: je
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; CHECK: br %r14
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entry:
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%val = load i16 *@g
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%src2 = zext i16 %val to i64
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%cond = icmp eq i64 %src1, %src2
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br i1 %cond, label %exit, label %mulb
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mulb:
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%mul = mul i64 %src1, %src1
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br label %exit
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exit:
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%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
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ret i64 %res
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}
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; Check inequality.
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define i64 @f4(i64 %src1) {
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; CHECK-LABEL: f4:
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; CHECK: clghrl %r2, g
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; CHECK-NEXT: jlh
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; CHECK: br %r14
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entry:
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%val = load i16 *@g
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%src2 = zext i16 %val to i64
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%cond = icmp ne i64 %src1, %src2
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br i1 %cond, label %exit, label %mulb
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mulb:
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%mul = mul i64 %src1, %src1
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br label %exit
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exit:
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%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
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ret i64 %res
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}
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; Repeat f1 with an unaligned address.
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define i64 @f5(i64 %src1) {
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; CHECK-LABEL: f5:
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; CHECK: lgrl [[REG:%r[0-5]]], h@GOT
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; CHECK: llgh [[VAL:%r[0-5]]], 0([[REG]])
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; CHECK: clgrjl %r2, [[VAL]],
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; CHECK: br %r14
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entry:
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%val = load i16 *@h, align 1
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%src2 = zext i16 %val to i64
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%cond = icmp ult i64 %src1, %src2
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br i1 %cond, label %exit, label %mulb
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mulb:
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%mul = mul i64 %src1, %src1
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br label %exit
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exit:
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%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
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ret i64 %res
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}
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; Check the comparison can be reversed if that allows CLGHRL to be used.
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define i64 @f6(i64 %src2) {
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; CHECK-LABEL: f6:
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; CHECK: clghrl %r2, g
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; CHECK-NEXT: jh {{\.L.*}}
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; CHECK: br %r14
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entry:
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%val = load i16 *@g
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%src1 = zext i16 %val to i64
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%cond = icmp ult i64 %src1, %src2
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br i1 %cond, label %exit, label %mulb
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mulb:
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%mul = mul i64 %src2, %src2
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br label %exit
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exit:
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%res = phi i64 [ %src2, %entry ], [ %mul, %mulb ]
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ret i64 %res
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}
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