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ccb7e96ef0
offset from a 32 bit aligned base as follows: ldw low, base[offset >> 2] ldw high, base[(offset >> 2) + 1] shr low_shifted, low, (offset & 0x3) * 8 shl high_shifted, high, 32 - (offset & 0x3) * 8 or result, low_shifted, high_shifted Expand 32 bit loads / stores with 16 bit alignment into two 16 bit loads / stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
489 B
LLVM
19 lines
489 B
LLVM
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
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; RUN: grep "bl __misaligned_store" %t1.s | count 1
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; RUN: grep st16 %t1.s | count 2
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; RUN: grep shr %t1.s | count 1
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; Byte aligned store. Expands to call to __misaligned_store.
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define void @align1(i32* %p, i32 %val) nounwind {
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entry:
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store i32 %val, i32* %p, align 1
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ret void
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}
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; Half word aligned store. Expands to two 16bit stores.
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define void @align2(i32* %p, i32 %val) nounwind {
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entry:
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store i32 %val, i32* %p, align 2
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ret void
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}
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