mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-27 13:30:05 +00:00
7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
2.1 KiB
LLVM
73 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=arm64-none-linux-gnu -code-model=large < %s | FileCheck %s
|
|
|
|
@var8 = global i8 0
|
|
@var16 = global i16 0
|
|
@var32 = global i32 0
|
|
@var64 = global i64 0
|
|
|
|
define i8* @global_addr() {
|
|
; CHECK-LABEL: global_addr:
|
|
ret i8* @var8
|
|
; The movz/movk calculation should end up returned directly in x0.
|
|
; CHECK: movz x0, #:abs_g3:var8
|
|
; CHECK: movk x0, #:abs_g2_nc:var8
|
|
; CHECK: movk x0, #:abs_g1_nc:var8
|
|
; CHECK: movk x0, #:abs_g0_nc:var8
|
|
; CHECK-NEXT: ret
|
|
}
|
|
|
|
define i8 @global_i8() {
|
|
; CHECK-LABEL: global_i8:
|
|
%val = load i8* @var8
|
|
ret i8 %val
|
|
; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var8
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var8
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var8
|
|
; CHECK: ldrb w0, [x[[ADDR_REG]]]
|
|
}
|
|
|
|
define i16 @global_i16() {
|
|
; CHECK-LABEL: global_i16:
|
|
%val = load i16* @var16
|
|
ret i16 %val
|
|
; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var16
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var16
|
|
; CHECK: ldrh w0, [x[[ADDR_REG]]]
|
|
}
|
|
|
|
define i32 @global_i32() {
|
|
; CHECK-LABEL: global_i32:
|
|
%val = load i32* @var32
|
|
ret i32 %val
|
|
; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var32
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var32
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var32
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var32
|
|
; CHECK: ldr w0, [x[[ADDR_REG]]]
|
|
}
|
|
|
|
define i64 @global_i64() {
|
|
; CHECK-LABEL: global_i64:
|
|
%val = load i64* @var64
|
|
ret i64 %val
|
|
; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var64
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var64
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var64
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var64
|
|
; CHECK: ldr x0, [x[[ADDR_REG]]]
|
|
}
|
|
|
|
define <2 x i64> @constpool() {
|
|
; CHECK-LABEL: constpool:
|
|
ret <2 x i64> <i64 123456789, i64 987654321100>
|
|
|
|
; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:[[CPADDR:.LCPI[0-9]+_[0-9]+]]
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:[[CPADDR]]
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:[[CPADDR]]
|
|
; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:[[CPADDR]]
|
|
; CHECK: ldr q0, [x[[ADDR_REG]]]
|
|
}
|