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https://github.com/c64scene-ar/llvm-6502.git
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7835f1fcdb
Add explicit testcases for tail calls within the same module. Duplicate some code to humor those who think .w doesn't apply on ARM. Leave this disabled on Thumb1, and add some comments explaining why it's hard and won't gain much. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
1.6 KiB
LLVM
49 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=arm-apple-darwin -march=arm | FileCheck %s -check-prefix=CHECKV4
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; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5
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; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\
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; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF
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@t = weak global i32 ()* null ; <i32 ()**> [#uses=1]
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declare void @g(i32, i32, i32, i32)
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define void @t1() {
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; CHECKELF: t1:
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; CHECKELF: PLT
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call void @g( i32 1, i32 2, i32 3, i32 4 )
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ret void
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}
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define void @t2() {
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; CHECKV4: t2:
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; CHECKV4: bx r0 @ TAILCALL
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; CHECKV5: t2:
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; CHECKV5: bx r0 @ TAILCALL
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%tmp = load i32 ()** @t ; <i32 ()*> [#uses=1]
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%tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0]
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ret void
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}
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define i32* @t3(i32, i32, i32*, i32*, i32*) nounwind {
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; CHECKV4: t3:
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; CHECKV4: bx r{{.*}}
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BB0:
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%5 = inttoptr i32 %0 to i32* ; <i32*> [#uses=1]
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%t35 = volatile load i32* %5 ; <i32> [#uses=1]
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%6 = inttoptr i32 %t35 to i32** ; <i32**> [#uses=1]
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%7 = getelementptr i32** %6, i32 86 ; <i32**> [#uses=1]
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%8 = load i32** %7 ; <i32*> [#uses=1]
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%9 = bitcast i32* %8 to i32* (i32, i32*, i32, i32*, i32*, i32*)* ; <i32* (i32, i32*, i32, i32*, i32*, i32*)*> [#uses=1]
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%10 = call i32* %9(i32 %0, i32* null, i32 %1, i32* %2, i32* %3, i32* %4) ; <i32*> [#uses=1]
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ret i32* %10
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}
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define void @t4() {
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; CHECKV4: t4:
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; CHECKV4: b _t2 @ TAILCALL
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; CHECKV5: t4:
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; CHECKV5: b _t2 @ TAILCALL
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tail call void @t2( ) ; <i32> [#uses=0]
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ret void
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}
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