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Andrew Trick e2b32bb20e ARM scheduling fix: don't guess at implicit operand latency. 
This is a minor drive-by fix with no robust way to unit test.
As an example see neon-div.ll:
SU(16):   %Q8<def> = VMOVLsv4i32 %D17, pred:14, pred:%noreg, %Q8<imp-use,kill>
 val SU(1): Latency=2 Reg=%Q8
...should be latency=1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22 02:50:33 +00:00
autoconf
bindings
cmake Avoid using the recently added APPEND_STRING feature. This should 2012-06-21 18:44:24 +00:00
docs [docs] Sphinxify GettingStartedVS. Patch by Mikael Lyngvig! 2012-06-21 23:27:09 +00:00
examples Remove trailing whitespaces 2012-06-21 22:26:01 +00:00
include Emit relocations for DW_AT_location entries on systems which need it. This is 2012-06-22 01:25:12 +00:00
lib ARM scheduling fix: don't guess at implicit operand latency. 2012-06-22 02:50:33 +00:00
projects
runtime
test ARM scheduling fix: compute predicated implicit use properly. 2012-06-22 02:50:31 +00:00
tools Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from a 2012-06-22 01:09:09 +00:00
unittests llvm/unittests: Simplify LINK_COMPONENTS. 2012-06-21 22:17:51 +00:00
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