llvm-6502/test/CodeGen
Hal Finkel e2b3751924 [PowerPC] Don't ever expand BUILD_VECTOR of v2i64 with shuffles
If we have two unique values for a v2i64 build vector, this will always result
in two vector loads if we expand using shuffles. Only one is necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205231 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-31 17:48:16 +00:00
..
AArch64 [AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS 2014-03-27 16:28:09 +00:00
ARM ARM: add intrinsics for the v8 ldaex/stlex 2014-03-26 14:39:31 +00:00
ARM64 ARM64: add extra patterns for scalar shifts 2014-03-31 15:46:46 +00:00
CPP
Generic
Hexagon
Inputs
Mips Fixed issue with microMIPS JAL instruction. 2014-03-31 14:00:10 +00:00
MSP430
NVPTX Fix for PR19099 - NVPTX produces invalid symbol names. 2014-03-31 15:56:26 +00:00
PowerPC [PowerPC] Don't ever expand BUILD_VECTOR of v2i64 with shuffles 2014-03-31 17:48:16 +00:00
R600 R600/SI: Lower i64 SELECT by bitcasting to a vector type 2014-03-31 14:01:55 +00:00
SPARC
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
Thumb
Thumb2
X86 Two updated tests for MinGW 32 and 64 exception handling code generation. 2014-03-31 17:34:15 +00:00
XCore