mirror of
https://github.com/c64scene-ar/llvm-6502.git
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d7e12561a5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202024 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
2.9 KiB
C++
95 lines
2.9 KiB
C++
//=== AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the AArch64 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AARCH64TARGETMACHINE_H
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#define LLVM_AARCH64TARGETMACHINE_H
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#include "AArch64FrameLowering.h"
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#include "AArch64ISelLowering.h"
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#include "AArch64InstrInfo.h"
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#include "AArch64SelectionDAGInfo.h"
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#include "AArch64Subtarget.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class AArch64TargetMachine : public LLVMTargetMachine {
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AArch64Subtarget Subtarget;
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AArch64InstrInfo InstrInfo;
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const DataLayout DL;
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AArch64TargetLowering TLInfo;
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AArch64SelectionDAGInfo TSInfo;
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AArch64FrameLowering FrameLowering;
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public:
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AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL,
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bool LittleEndian);
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const AArch64InstrInfo *getInstrInfo() const {
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return &InstrInfo;
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}
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const AArch64FrameLowering *getFrameLowering() const {
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return &FrameLowering;
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}
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const AArch64TargetLowering *getTargetLowering() const {
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return &TLInfo;
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}
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const AArch64SelectionDAGInfo *getSelectionDAGInfo() const {
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return &TSInfo;
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}
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const AArch64Subtarget *getSubtargetImpl() const { return &Subtarget; }
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const DataLayout *getDataLayout() const { return &DL; }
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const TargetRegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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}
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TargetPassConfig *createPassConfig(PassManagerBase &PM);
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virtual void addAnalysisPasses(PassManagerBase &PM);
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};
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// AArch64leTargetMachine - AArch64 little endian target machine.
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//
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class AArch64leTargetMachine : public AArch64TargetMachine {
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virtual void anchor();
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public:
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AArch64leTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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// AArch64beTargetMachine - AArch64 big endian target machine.
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//
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class AArch64beTargetMachine : public AArch64TargetMachine {
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virtual void anchor();
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public:
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AArch64beTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // End llvm namespace
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#endif
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