llvm-6502/test/CodeGen
Hal Finkel e2ff00e117 PPC: Add some missing V_SET0 patterns
We had patterns to match v4i32 immAllZerosV -> V_SET0, but not patterns for
v8i16 (which occurs in the test case) or v16i8. The same was true for
V_SETALLONES (so I added the associated patterns for those as well).

Another bug found by llvm-stress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186108 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 17:43:32 +00:00
..
AArch64 AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all 2013-07-09 18:16:56 +00:00
ARM Add a comment to this change, requested by Eric Christopher. 2013-07-08 19:52:51 +00:00
CPP
Generic Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
Hexagon
Inputs
MBlaze
Mips [mips] Fix test case to check that mips64 instructions are generated. 2013-07-01 20:18:58 +00:00
MSP430 Really fix the test. Sorry for the breakage... 2013-07-01 19:51:36 +00:00
NVPTX [NVPTX] Add support for module-scope inline asm 2013-07-01 13:00:14 +00:00
PowerPC PPC: Add some missing V_SET0 patterns 2013-07-11 17:43:32 +00:00
R600 R600/SI: Initial local memory support 2013-07-10 16:37:07 +00:00
SI
SPARC Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo. 2013-06-17 19:00:36 +00:00
SystemZ [SystemZ] Add testcase missing from r186073 2013-07-11 09:10:38 +00:00
Thumb
Thumb2 ARM: Fix incorrect pack pattern for thumb2 2013-07-09 22:59:22 +00:00
X86 Move r186044 tests into CodeGen/X86 2013-07-11 01:55:55 +00:00
XCore [XCore] Add ISel pattern for LDWCP 2013-07-03 07:48:50 +00:00