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AsmParser
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This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
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2013-06-24 10:05:34 +00:00 |
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Disassembler
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InstPrinter
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MCTargetDesc
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Mips ELF: Mark object file as ABI compliant
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2013-06-18 19:47:15 +00:00 |
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TargetInfo
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CMakeLists.txt
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Fix CMakeLists.
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2013-06-11 22:36:30 +00:00 |
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LLVMBuild.txt
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Makefile
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MicroMipsInstrFormats.td
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MicroMipsInstrInfo.td
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Mips16FrameLowering.cpp
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Use pointers to the MCAsmInfo and MCRegInfo.
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2013-06-18 07:20:20 +00:00 |
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Mips16FrameLowering.h
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Mips16HardFloat.cpp
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Mips16HardFloat.h
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Mips16InstrFormats.td
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Mips16InstrInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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Mips16InstrInfo.h
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Mips16InstrInfo.td
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Mips16ISelDAGToDAG.cpp
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Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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2013-06-19 21:36:55 +00:00 |
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Mips16ISelDAGToDAG.h
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Track IR ordering of SelectionDAG nodes 2/4.
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2013-05-25 02:42:55 +00:00 |
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Mips16ISelLowering.cpp
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Mips: Remove global set.
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2013-06-13 19:06:52 +00:00 |
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Mips16ISelLowering.h
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Mips: Remove global set.
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2013-06-13 19:06:52 +00:00 |
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Mips16RegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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Mips16RegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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Mips64InstrInfo.td
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Mips.h
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[mips] Add an IR transformation pass that optimizes calls to sqrt.
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2013-06-11 22:21:44 +00:00 |
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Mips.td
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MipsAnalyzeImmediate.cpp
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Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
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2013-05-24 22:23:49 +00:00 |
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MipsAnalyzeImmediate.h
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MipsAsmPrinter.cpp
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Mips ELF: Mark object file as ABI compliant
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2013-06-18 19:47:15 +00:00 |
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MipsAsmPrinter.h
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DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
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2013-06-16 20:34:27 +00:00 |
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MipsCallingConv.td
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MipsCodeEmitter.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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MipsCondMov.td
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MipsConstantIslandPass.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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MipsDelaySlotFiller.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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MipsDSPInstrFormats.td
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MipsDSPInstrInfo.td
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MipsFrameLowering.cpp
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MipsFrameLowering.h
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MipsInstrFormats.td
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MipsInstrFPU.td
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This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
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2013-06-24 10:05:34 +00:00 |
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MipsInstrInfo.cpp
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DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
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2013-06-16 20:34:27 +00:00 |
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MipsInstrInfo.h
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DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
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2013-06-16 20:34:27 +00:00 |
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MipsInstrInfo.td
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[mips] brcond + setgt/setugt instruction selection patterns.
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2013-06-05 19:49:55 +00:00 |
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MipsISelDAGToDAG.cpp
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Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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2013-06-19 21:36:55 +00:00 |
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MipsISelDAGToDAG.h
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MipsISelLowering.cpp
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The getRegForInlineAsmConstraint function should only accept MVT value types.
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2013-06-22 18:37:38 +00:00 |
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MipsISelLowering.h
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The getRegForInlineAsmConstraint function should only accept MVT value types.
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2013-06-22 18:37:38 +00:00 |
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MipsJITInfo.cpp
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MipsJITInfo.h
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MipsLongBranch.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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MipsMachineFunction.cpp
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MipsMachineFunction.h
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MipsMCInstLower.cpp
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MipsMCInstLower.h
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MipsModuleISelDAGToDAG.cpp
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MipsModuleISelDAGToDAG.h
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MipsOptimizeMathLibCalls.cpp
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[mips] Add an IR transformation pass that optimizes calls to sqrt.
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2013-06-11 22:21:44 +00:00 |
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MipsOs16.cpp
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MipsOs16.h
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MipsRegisterInfo.cpp
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MipsRegisterInfo.h
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MipsRegisterInfo.td
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This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
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2013-06-24 10:05:34 +00:00 |
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MipsRelocations.h
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MipsSchedule.td
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MipsSEFrameLowering.cpp
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Use pointers to the MCAsmInfo and MCRegInfo.
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2013-06-18 07:20:20 +00:00 |
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MipsSEFrameLowering.h
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MipsSEInstrInfo.cpp
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[mips] Use function TargetInstrInfo::getRegClass.
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2013-06-11 18:48:16 +00:00 |
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MipsSEInstrInfo.h
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[mips] Use function TargetInstrInfo::getRegClass.
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2013-06-11 18:48:16 +00:00 |
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MipsSEISelDAGToDAG.cpp
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Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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2013-06-19 21:36:55 +00:00 |
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MipsSEISelDAGToDAG.h
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Track IR ordering of SelectionDAG nodes 2/4.
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2013-05-25 02:42:55 +00:00 |
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MipsSEISelLowering.cpp
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Track IR ordering of SelectionDAG nodes 2/4.
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2013-05-25 02:42:55 +00:00 |
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MipsSEISelLowering.h
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MipsSelectionDAGInfo.cpp
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MipsSelectionDAGInfo.h
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MipsSERegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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MipsSERegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
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MipsSubtarget.cpp
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MipsSubtarget.h
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MipsTargetMachine.cpp
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[mips] Add an IR transformation pass that optimizes calls to sqrt.
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2013-06-11 22:21:44 +00:00 |
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MipsTargetMachine.h
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MipsTargetObjectFile.cpp
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MipsTargetObjectFile.h
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